chore: release notes

TerosTechnology · Jul 21, 2023 · 1369dd6 · 1369dd6
1 parent f4c8f41
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Showing 2 changed files with 5 additions and 3 deletions.
diff --git a/packages/colibri/src/template/helpers/template_definition_vhdl.ts b/packages/colibri/src/template/helpers/template_definition_vhdl.ts
@@ -27,9 +27,9 @@ export const hdl_element_component =
 {{ indent[1] }}port (
 {% for port_inst in port -%}
 {% if loop.last -%}
-{{ indent[2] }}{{port_inst['info']['name']}} : {{port_inst['direction']} {{port_inst['type']}}
+{{ indent[2] }}{{port_inst['info']['name']}} : {{port_inst['direction']}} {{port_inst['type']}}
 {% else -%}
-{{ indent[2] }}{{port_inst['info']['name']}} : {{port_inst['direction']} {{port_inst['type']}};
+{{ indent[2] }}{{port_inst['info']['name']}} : {{port_inst['direction']}} {{port_inst['type']}};
 {% endif -%}
 {% endfor -%}
 {{ indent[1] }});

diff --git a/packages/teroshdl/resources/release_notes/release-notes.html b/packages/teroshdl/resources/release_notes/release-notes.html
@@ -33,9 +33,11 @@
     <br>
     <br>
 
-    <h4 id="release-notes"> Minor changes v5.0.4 and v5.0.5</h4>
+    <h4 id="release-notes"> Minor changes v5.0.5 and v5.0.6</h4>
     <p>
         <ul>
+            <li> Improve Python detection</li>
+            <li> Fix bug VHDL component template</li>
             <li> Support for GUI in VUnit</li>
             <li> Support for "copy as VHDL component" in Verilog/SV templates</li>
             <li> Fix bug parsing Verilog/SV arrays</li>