Final Year CSE undergrad IIT JODHPUR
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FSM-Extraction-From-Verilog-Design-Description
FSM-Extraction-From-Verilog-Design-Description PublicExtracting FSM from verilog design description supervised by Dr. Binod Kumar
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Typing-Master
Typing-Master PublicThis is a Simple Typing Speed Checking Website with User Registration & Login systems app done with Node.js Framework using MongoDB(Compass) as the data store, Express as the routing system, Body-p…
EJS 2
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Electronic-Voting-Machine
Electronic-Voting-Machine PublicImplementation of Electronic Voting Machine on FPGA board as part of Digital Design Project
Verilog 3
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