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Use absl containers, which are more efficient.
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Signed-off-by: Henner Zeller <[email protected]>
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hzeller committed Nov 8, 2021
1 parent 0d1c936 commit d0d0d94
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Showing 4 changed files with 8 additions and 3 deletions.
1 change: 1 addition & 0 deletions common/tools/BUILD
Original file line number Diff line number Diff line change
Expand Up @@ -62,6 +62,7 @@ cc_binary(
visibility = ["//:__subpackages__"],
deps = [
"//common/util:init_command_line",
"@com_google_absl//absl/container:flat_hash_map",
"@com_google_absl//absl/flags:flag",
"@com_google_absl//absl/strings",
],
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5 changes: 3 additions & 2 deletions common/tools/jcxxgen.cc
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Expand Up @@ -23,6 +23,7 @@
#include <string>
#include <unordered_map>

#include "absl/container/flat_hash_map.h"
#include "absl/flags/flag.h"
#include "absl/strings/match.h"
#include "absl/strings/str_cat.h"
Expand Down Expand Up @@ -148,7 +149,7 @@ static bool ParseObjectTypesFromFile(const std::string &filename,

// Validate types and return if successful.
static bool ValidateTypes(ObjectTypeVector *object_types) {
std::unordered_map<std::string, ObjectType *> typeByName;
absl::flat_hash_map<std::string, ObjectType *> typeByName;

for (auto &obj : *object_types) {
// We only insert types as they come, so that we can make sure they are
Expand Down Expand Up @@ -186,7 +187,7 @@ static bool ValidateTypes(ObjectTypeVector *object_types) {

// Validate that we don't have properties with the same name twice in
// one class (including superclasses)
std::unordered_map<std::string, const Property *> my_property_names;
absl::flat_hash_map<std::string, const Property *> my_property_names;
for (const auto &p : obj->properties) {
auto inserted = my_property_names.insert({p.name, &p});
if (inserted.second) continue;
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1 change: 1 addition & 0 deletions verilog/tools/kythe/BUILD
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Expand Up @@ -93,6 +93,7 @@ cc_library(
"//verilog/analysis:verilog_project",
"@com_google_absl//absl/memory",
"@com_google_absl//absl/strings",
"@com_google_absl//absl/container:btree",
],
)

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4 changes: 3 additions & 1 deletion verilog/tools/kythe/kythe_facts_extractor.cc
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Expand Up @@ -22,6 +22,7 @@
#include <utility>
#include <vector>

#include "absl/container/btree_map.h"
#include "absl/memory/memory.h"
#include "absl/strings/escaping.h"
#include "absl/strings/str_cat.h"
Expand Down Expand Up @@ -295,7 +296,8 @@ KytheIndexingData ExtractKytheFacts(const IndexingFactNode& file_list,

// Create a reverse map from resolved path to referenced path.
// All string_views reference memory owned inside 'project'.
std::map<absl::string_view, absl::string_view, verible::StringViewCompare>
absl::btree_map<absl::string_view, absl::string_view,
verible::StringViewCompare>
file_path_reverse_map;
for (const auto& file_entry : project) {
const VerilogSourceFile& source(*file_entry.second);
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