Include links to verible-formatter-action in documentation.

Signed-off-by: Henner Zeller <[email protected]>

README.md

@@ -136,12 +136,13 @@ editor-independent consistency.
 
 Features (various degress of work-in-progress):
 
-*   Corrects indentation
-*   Corrects inter-token spacing, with syntax context awareness
-*   Line-wrapping to a column limit
-*   Support for incremental formatting, only touched changed lines.
-*   Interactive formatting: accept or decline formatting changes
-*   Tabular alignment
+ * Corrects indentation
+ * Corrects inter-token spacing, with syntax context awareness
+ * Line-wrapping to a column limit
+ * Support for incremental formatting, only touched changed lines.
+ * Interactive formatting: accept or decline formatting changes
+ * Tabular alignment
+ * [Github SystemVerilog formatter action][github-format-action] available.
 
 <!--
 TODO(fangism): a demo GIF animation here.
@@ -209,5 +210,6 @@ abstract syntax tree (AST). If you are interested in collaborating, contact us.
 [SV-LRM]: https://ieeexplore.ieee.org/document/8299595
 [lint-rule-list]: https://chipsalliance.github.io/verible/lint.html
 [github-lint-action]: https://github.com/chipsalliance/verible-linter-action
+[github-format-action]: https://github.com/chipsalliance/verible-formatter-action
 [binary releases]: https://github.com/chipsalliance/verible/releases
 [language server protocol]: https://microsoft.github.io/language-server-protocol/

verilog/tools/formatter/README.md

@@ -7,6 +7,9 @@ freshness: { owner: 'hzeller' reviewed: '2020-10-07' }
 `verible-verilog-format` is the SystemVerilog formatter tool. You can can
 get a full set of avilable flags using the `--helpfull` flag.
 
+For automatic formatting suggestions on github pull requests, there is a
+[easy to integrate github action available][github-format-action].
+
 ## Usage
 
 ```
@@ -364,3 +367,5 @@ If the formatter crashes for any other reason, it will leave the original file
 intact. The formatter does not attempt to open any file for writing in-place
 until all formatting calculations have been done and internal verifications
 pass.
+
+[github-format-action]: https://github.com/chipsalliance/verible-formatter-action