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enable prefetching when accessing PSRAM over AHB
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A-Dunstan authored and squidcc committed Jan 17, 2024
1 parent c5e7163 commit 63a8b40
Showing 1 changed file with 6 additions and 10 deletions.
16 changes: 6 additions & 10 deletions teensy4/startup.c
Original file line number Diff line number Diff line change
Expand Up @@ -420,16 +420,12 @@ FLASHMEM void configure_external_ram()
| FLEXSPI_MCR2_CLRLEARNPHASE | FLEXSPI_MCR2_CLRAHBBUFOPT))
| FLEXSPI_MCR2_RESUMEWAIT(0x20) /*| FLEXSPI_MCR2_SAMEDEVICEEN*/;

FLEXSPI2_AHBCR = FLEXSPI2_AHBCR & ~(FLEXSPI_AHBCR_READADDROPT | FLEXSPI_AHBCR_PREFETCHEN
| FLEXSPI_AHBCR_BUFFERABLEEN | FLEXSPI_AHBCR_CACHABLEEN);
uint32_t mask = (FLEXSPI_AHBRXBUFCR0_PREFETCHEN | FLEXSPI_AHBRXBUFCR0_PRIORITY_MASK
| FLEXSPI_AHBRXBUFCR0_MSTRID_MASK | FLEXSPI_AHBRXBUFCR0_BUFSZ_MASK);
FLEXSPI2_AHBRXBUF0CR0 = (FLEXSPI2_AHBRXBUF0CR0 & ~mask)
| FLEXSPI_AHBRXBUFCR0_PREFETCHEN | FLEXSPI_AHBRXBUFCR0_BUFSZ(64);
FLEXSPI2_AHBRXBUF1CR0 = (FLEXSPI2_AHBRXBUF0CR0 & ~mask)
| FLEXSPI_AHBRXBUFCR0_PREFETCHEN | FLEXSPI_AHBRXBUFCR0_BUFSZ(64);
FLEXSPI2_AHBRXBUF2CR0 = mask;
FLEXSPI2_AHBRXBUF3CR0 = mask;
FLEXSPI2_AHBCR = FLEXSPI_AHBCR_PREFETCHEN | FLEXSPI_AHBCR_BUFFERABLEEN;
// disable BUF0/1/2, BUF3 will share entire buffer space between all AHB masters
FLEXSPI2_AHBRXBUF0CR0 = 0;
FLEXSPI2_AHBRXBUF1CR0 = 0;
FLEXSPI2_AHBRXBUF2CR0 = 0;
FLEXSPI2_AHBRXBUF3CR0 = FLEXSPI_AHBRXBUFCR0_PREFETCHEN;

// RX watermark = one 64 bit line
FLEXSPI2_IPRXFCR = (FLEXSPI_IPRXFCR & 0xFFFFFFC0) | FLEXSPI_IPRXFCR_CLRIPRXF;
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