[RFC] PPC hardfpu for instructions that don't alter FPSCR.FI #80
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This is a very simple patch written on top of #76 which tries to enable hardfpu for PPC targets. Specifically, this RFC makes the changes for multiply-add instructions to be able to use hardfpu.
The construct above allows the inexact flag to be set when
Having the inexact flag set in
float_exception_flags
is a requirement for the hardfpu code to work (seecan_use_fpu()
in fpu/softfloat.c)The problem with this solution is that it would only be able to enable hardfpu for a small set of instructions (those which don't alter FI). I think the list of all instructions which would work with this idea is:
Which are only a subset of vector and vsx instructions. For floating point instructions, we need to think in another solution. For now, this RFC is for the instructions that can benefit from the 'not alter FI' behavior
I did some testing and the results and the FPSCR flags seem to be emulated correctly with these patches applied. However, I can't get rid of the feeling that I'm not understanding something and it might not be that simple. Can anyone think of a situation this won't work?