Add missing warning doc

MikePopoloski · Dec 16, 2023 · e557c68 · e557c68
1 parent f148698
commit e557c68
Showing 1 changed file with 7 additions and 0 deletions.
diff --git a/scripts/warning_docs.txt b/scripts/warning_docs.txt
@@ -1078,3 +1078,10 @@ module m;
     assign b = a;
 endmodule
 ```
+
+-Wdpi-pure-task
+A DPI import task is marked 'pure', which is disallowed by SystemVerilog but can be
+downgraded to a warning to support code compatibility with other tools.
+```
+import "DPI-C" pure task func(logic [3:0] a);
+```