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merging miv-rv32-coregpio-examples reference f614ff1ad4c
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con-pax committed Aug 27, 2021
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1,637 changes: 1,637 additions & 0 deletions driver-examples/CoreGPIO/miv-rv32-coregpio-example/.cproject

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7 changes: 7 additions & 0 deletions driver-examples/CoreGPIO/miv-rv32-coregpio-example/.gitignore
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/*miv-rv32i-debug*/
/*miv-rv32-imc-release*/
/*miv-rv32-imc-debug*/
/*miv-rv32ima-release*/
/*miv-rv32ima-debug*/
/*miv-rv32i-release*/
/.settings*/
36 changes: 36 additions & 0 deletions driver-examples/CoreGPIO/miv-rv32-coregpio-example/.project
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48 changes: 48 additions & 0 deletions driver-examples/CoreGPIO/miv-rv32-coregpio-example/README.md
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# CoreGPIO Example

This example project demonstrates the use of CoreGPIO driver APIs. The output port configuration
is demonstrated using the onboard LEDs.

## How to use this example

This sample project is targeted at a MIV_RV32 design running on a PolarFire
Avalanche board(Future Electronics) connected via a USB-UART serial cable to a host PC running
a terminal emulator such as TeraTerm or Putty configured as follows:
- 115200 baud
- 8 data bits
- 1 stop bit
- no parity
- no flow control.

## Target hardware
This example can be targeted at the latest Mi-V Soft Processor MIV_RV32 or at the
legacy variants such as Mi-V_RV32IMA_L1_AXI etc. Choose the build configurations
per the target processor in your design and the supported ISA extensions that you want to use.

All the design specific definitions such as peripheral base addresses, system clock frequency
etc. are included in hw_platform.h.

To test this project, use Mi-V soft processor design targeted at Avalanche board available
at [github Mi-V-Soft-RISC-V](https://github.com/Mi-V-Soft-RISC-V/Future-Avalanche-Board/tree/main/Libero_Projects).
Ensure that the hw_platform.h matches the design.

This example project can be used with another design using a different hardware
configuration. This can be achieved by overwriting the content of this example
project's "hw_platform.h" file with the correct data from your Libero design.

### Booting the system:

Currently the example project is configured to use FlashPro debugger to execute
from LSRAM in both Debug and Release mode.

In the release mode build configuration, following setting is used
`--change-section-lma *-0x80000000`
under
Tool Settings > GNU RISC-V Cross Create Flash Image > General > Other flags .

This will allow you to attach the release mode executable as the memory
initialization client in Libero when you want to execute it from non-volatile memory.

## Silicon revision dependencies
This example is tested on PolarFire MPF300TS device.
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/*******************************************************************************
* Copyright 2019-2021 Microchip FPGA Embedded Systems Solutions.
*
* SPDX-License-Identifier: MIT
*
* Application demonstrating the use of CoreGPIO driver. Please see the
* Readme.md for more details.
*/
#include <drivers/fpga_ip/CoreGPIO/core_gpio.h>
#include <drivers/fpga_ip/CoreUARTapb/core_uart_apb.h>
#include "fpga_design_config/hw_platform.h"
#include "miv_rv32_hal/miv_rv32_hal.h"

/*******************************************************************************
* Types, Constants and Greetings messages
*******************************************************************************/

#define APB_BUS_WIDTH GPIO_APB_32_BITS_BUS
#define RX_BUFF_SIZE 64U
#define HIGH 1u
#define LOW 0U

gpio_instance_t g_gpio;
UART_instance_t g_uart;

uint8_t g_message[] =
"\r\n\r\n\
******************************************************************************\r\n\
******************* CoreGPIO Example Project ********************************\r\n\
******************************************************************************\r\n\
This example project demonstrates the use of the CoreGPIO driver\r\n\
with Mi-V soft processor on Future Electronics Polarfire Avalanche board\r\n\
observe LED1 and LED2 on the Avalanche board. LED1 and LED2 will blink simultaneously\r\n\
after some predefined delay \r\n\n";

/* delay in ms */
static void delay(uint8_t t_in_ms);

/*******************************************************************************
* main
*******************************************************************************/
void main()
{
/* LED state variable */
uint8_t LED1_state = HIGH;
uint8_t LED2_state = LOW;

/* Initialize UART and GPIO instances */
UART_init( &g_uart, COREUARTAPB0_BASE_ADDR,\
BAUD_VALUE_115200, (DATA_8_BITS | NO_PARITY) );

GPIO_init(&g_gpio, COREGPIO_OUT_BASE_ADDR,APB_BUS_WIDTH);

/* Greeting message */
UART_polled_tx_string(&g_uart,g_message);

/* Set GPIO LED state */
GPIO_set_output(&g_gpio, GPIO_1, LED1_state );
GPIO_set_output(&g_gpio, GPIO_0, LED2_state );

while(1)
{

/* Toggle LEDS indefinitely */
delay(25);

LED1_state = (~LED1_state & 0b00000001) ;
LED2_state = (~LED2_state & 0b00000001) ;

GPIO_set_output(&g_gpio, GPIO_1, LED1_state );
GPIO_set_output(&g_gpio, GPIO_0, LED2_state );

delay(25);
}
}

/* delay in ms */
static void delay(uint8_t t_in_ms)
{
uint32_t loopcount = (t_in_ms * SYS_CLK_FREQ)/1000U;
for (int count = 0 ; count < loopcount ; count++)
{

}
}

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