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/.settings/ | ||
/*miv-rv32-imc-debug*/ | ||
/*miv-rv32-imc-release*/ | ||
/*miv-rv32-imc-release*/ |
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PolarFire User Crypto AES Cryptography Services example | ||
================================================================================ | ||
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# PolarFire User Crypto AES Cryptography Services example | ||
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This example project demonstrate the use of symmetric key encryption and | ||
decryption services. The following PolarFire User Crypto service functions are used | ||
decryption services. The following PolarFire User Crypto service functions are | ||
used: | ||
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- CALSymEncrypt() | ||
- CALSymEncryptDMA() | ||
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@@ -15,24 +17,23 @@ The following configurations are provided with the example: | |
- miv-rv32-imc-debug | ||
- miv-rv32-imc-release | ||
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Mi-V Soft Processor | ||
-------------------------------------------------------------------------------- | ||
This example uses Mi-V SoftProcessor MiV_RV32.The design is built for debugging | ||
MiV_RV32 through the PolarFire FPGA programming JTAG port using a FlashPro5. | ||
## Mi-V Soft Processor | ||
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This example uses Mi-V SoftProcessor MIV_RV32.The design is built for debugging | ||
MIV_RV32 through the PolarFire FPGA programming JTAG port using a FlashPro5. | ||
To achieve this the CoreJTAGDebug IP is used to connect to the JTAG port of the | ||
MiV_RV32. | ||
MIV_RV32. | ||
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All the platform/design specific definitions such as peripheral base addresses, | ||
system clock frequency etc. are included in fpga_design_config.h. The | ||
fpga_design_config.h is located at the root folder of this project. | ||
system clock frequency etc. are included in fpga_design_config.h. | ||
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The Mi-V Soft Processor MiV_RV32 firmware projects needs the miv_rv32_hal and | ||
The Mi-V Soft Processor MIV_RV32 firmware projects needs the MIV_RV32 HAL and | ||
the hal firmware(RISC-V HAL). | ||
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The RISC-V HAL is available at GitHub [Mi-V-Soft-RISC-V](https://mi-v-ecosystem.github.io/redirects/platform). | ||
The hal is available at GitHub [Mi-V-Soft-RISC-V](https://mi-v-ecosystem.github.io/redirects/platform). | ||
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How to use this example | ||
-------------------------------------------------------------------------------- | ||
## How to use this example | ||
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This example project is targeted at a MIV_RV32 design running on a PolarFire-Eval-Kit | ||
connected via a USB-UART serial cable to a host PC running a terminal emulator | ||
such as TeraTerm or Putty configured as follows: | ||
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This program displays the return data from User Crypto processor for encryption | ||
and decryption services. | ||
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fpga_design_config (formerly known as hw_config.h) | ||
-------------------------------------------------------------------------------- | ||
## fpga_design_config (formerly known as hw_config.h) | ||
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The SoftConsole project targeted for Mi-V processors now use an improved | ||
directory structure. The fpga_design_config.h must be stored as shown below | ||
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@@ -62,7 +63,7 @@ Currently, this file must be hand crafted when using the Mi-V Soft Processor. | |
In future, all the design and soft IP configurations will be automatically | ||
generated from the Libero design description data. | ||
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You can use the sample file provided with MIV_RV32 HAL as an example. Rename it | ||
You can use the sample file provided with miv_rv32_hal as an example. Rename it | ||
from sample_fpga_design_config.h to fpga_design_config.h and then customize it | ||
per your hardware design such as SYS_CLK_FREQ, peripheral BASE addresses, | ||
interrupt numbers, definition of MSCC_STDIO_UART_BASE_ADDR if you want a | ||
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2. A symbol INC_STDINT_H is defined in project preprocessor setting. | ||
For more detail, please refer to caltypes.h file present in CAL folder. | ||
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### Test script | ||
### Test Script | ||
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A test script is provided with this example which automatically enters the NIST | ||
vectors and associated data to verify the functionality. You can use | ||
RV32_AES_Cryptography.ttl Tera Term Macro script present in project directory for | ||
AES_Cryptography.ttl Tera Term Macro script present in project directory for | ||
testing AES Cryptography example project. | ||
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**NOTE:** | ||
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to 5msec/char and 5msec/line. | ||
3. By default, Tera Term log will be stored in Tera Term installation Directory. | ||
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## Target hardware | ||
## Target Hardware | ||
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This project was tested on PolarFire-Eval-Kit with CFG4 configuration of the | ||
MIV_RV32 design available [here](https://github.com/Mi-V-Soft-RISC-V/PolarFire-Eval-Kit/tree/main/Libero_Projects) | ||
This project is tested on PolarFire-Eval-Kit with CFG4 configuration of the | ||
MIV_RV32 base design available at github [Mi-V-Soft-RISC-V](https://mi-v-ecosystem.github.io/redirects/repo-polarfire-evaluation-kit-mi-v-sample-fpga-designs) | ||
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All the design specific definitions such as peripheral base addresses, system | ||
clock frequency etc. are included in fpga_design_config.h. | ||
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configurations. This can be achieved by overwriting the content of this example | ||
project's "fpga_design_config.h" file with the correct data per your Libero design. | ||
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### Booting the system | ||
### Booting the System | ||
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Currently the example project is configured to use FlashPro debugger to execute | ||
from LSRAM in both Debug and Release mode. | ||
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This will allow you to attach the release mode executable as the memory | ||
initialization client in Libero when you want to execute it from non-volatile memory. | ||
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## Silicon revision dependencies | ||
## Silicon Revision Dependencies | ||
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This example is tested on PolarFire MPF300TS device. | ||
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### CAL library src | ||
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To obtain the CAL source code and a SoftConsole project to generate the CAL | ||
library archive file (*.a) refer [SoftConsole Documentation](https://mi-v-ecosystem.github.io/SoftConsole-Documentation/SoftConsole-v2021.3/using_softconsole/other.html#crypto-application-library). | ||
The CAL source code is bound by license agreement and it will be available as | ||
part of the SoftConsole installation if the CAL specific license was agreed | ||
while installing it. | ||
### CAL Library Src | ||
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The CAL source code is bound by license agreement. If you need access to the CAL | ||
source code, please contact [email protected] for further details on | ||
NDA requirements. |
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user-crypto/miv-rv32-aes-cryptography/src/platform/LICENSE.md
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# The Mi-V soft processor Platform Software License | ||
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The Mi-V soft processor Platform Software is released under the following | ||
software license: | ||
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Copyright 2019 Microchip Corporation. | ||
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SPDX-License-Identifier: MIT | ||
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Permission is hereby granted, free of charge, to any person obtaining a copy | ||
of this software and associated documentation files (the "Software"), to | ||
deal in the Software without restriction, including without limitation the | ||
rights to use, copy, modify, merge, publish, distribute, sublicense, and/or | ||
sell copies of the Software, and to permit persons to whom the Software is | ||
furnished to do so, subject to the following conditions: | ||
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The above copyright notice and this permission notice shall be included in | ||
all copies or substantial portions of the Software. | ||
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE | ||
AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | ||
FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS | ||
IN THE SOFTWARE. |
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@@ -1,3 +1,3 @@ | ||
/.settings/ | ||
/*miv-rv32-imc-debug*/ | ||
/*miv-rv32-imc-release*/ | ||
/*miv-rv32-imc-release*/ |
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