Hardware Design and Verification of a configurable and parametrized 50th order low-pass FIR filter starting from MATLAB Modeling to Verilog RTL Design and Simulink Testing with .wav audio files.
Design Specifications:
- Filter Order: 50 (51 Taps)
- Windowing Method: Hamming
- Sampling Frequency: 44.1KHz
- Cutoff Frequency: 3.5KHz
- Sampled Data Input Size: 16-bit
- Filter Coefficients Size: 16-bit
- Filtered Data Output Size: 32-bit
Design Flow: Check the Documentation
- Getting Started with FIR Filter Concept
- System Modeling using MATLAB
- FIR Filter Architecure (Block Diagram)
- Hardware Design using Verilog
- Testbench and Simulation using Vivado
- .WAV File Filtering using Simulink
Project Files:
- src/fir_filter.v: verilog design
- tb/fir_filter_tb.v: verilog testbench
- tb/fir_filter_tasks.v: verilog testbench tasks
- simulink_test/fir_simulink_test.slx: simulink project
- simulink_test/fir_filter_simulink_test.v: verilog design for simulink
- simulink_test/signal.wav: original signal audio file for simulink
- simulink_test/ noise.wav: noise signal audio file for simulink
- Digital Design of FIR Filter.pdf: project documentation
