Add the support for changing bootrom

Bender.yml

@@ -66,13 +66,6 @@ sources:
       - hw/spm_interface/test/tb_spm_rmw_adapter.sv
       - hw/spm_interface/test/tb_spm_1p_adv.sv
 
-  # soc_ctrl
-  - target: occamy
-    files:
-      - target/rtl/src/soc_ctrl/occamy_soc_reg_pkg.sv
-      - target/rtl/src/soc_ctrl/occamy_soc_reg_top.sv
-  - hw/occamy/soc_ctrl/occamy_soc_ctrl.sv
-
   # cluster wrapper (If the file is added in the snax repo, then it does not needed to be added here)
 
   - target: snax_minimal_cluster
@@ -85,10 +78,15 @@ sources:
       # quadrant_s1_ctrl
       - target/rtl/src/quadrant_s1_ctrl/occamy_quadrant_s1_reg_pkg.sv
       - target/rtl/src/quadrant_s1_ctrl/occamy_quadrant_s1_reg_top.sv
-
+
+      # soc_ctrl
+      - target/rtl/src/soc_ctrl/occamy_soc_reg_pkg.sv
+      - target/rtl/src/soc_ctrl/occamy_soc_reg_top.sv
+      - target/rtl/src/soc_ctrl/occamy_soc_ctrl.sv
+
       # hbm_xbar_ctrl
-      - target/rtl/src/hbm_xbar_ctrl/occamy_hbm_xbar_reg_pkg.sv
-      - target/rtl/src/hbm_xbar_ctrl/occamy_hbm_xbar_reg_top.sv
+      #- target/rtl/src/hbm_xbar_ctrl/occamy_hbm_xbar_reg_pkg.sv
+      #- target/rtl/src/hbm_xbar_ctrl/occamy_hbm_xbar_reg_top.sv
 
       # rv_plic
       - target/rtl/src/rv_plic/rv_plic_reg_pkg.sv

docs/schema/occamy.schema.json

@@ -443,6 +443,12 @@
         },
         "peripherals": {
             "$ref": "http://pulp-platform.org/occamy/peripherals.schema.json"
+        },
+        "backup_boot_addr":{
+            "type": "integer",
+            "description": "Backup Boot Address",
+            "default": 2147483648            
         }
+
     }
 }

hw/occamy/occamy_cva6.sv.tpl

@@ -13,6 +13,7 @@ module ${name}_cva6 import ${name}_pkg::*; (
   input  logic              ipi_i,
   input  logic              time_irq_i,
   input  logic              debug_req_i,
+  input  logic [${occamy_cfg["addr_width"]-1}:0]       boot_addr_i,
   output ${soc_narrow_xbar.in_cva6.req_type()} axi_req_o,
   input  ${soc_narrow_xbar.in_cva6.rsp_type()} axi_resp_i,
   input  sram_cfg_cva6_t    sram_cfg_i
@@ -52,7 +53,10 @@ module ${name}_cva6 import ${name}_pkg::*; (
   logic              ipi;
   logic              time_irq;
   logic              debug_req;
-
+  logic [63:0]       cva6_boot_addr;
+  always_comb begin
+      cva6_boot_addr = {${64-occamy_cfg["addr_width"]}'h0, boot_addr_i};
+  end
   sync #(.STAGES (2))
     i_sync_debug (.clk_i, .rst_ni, .serial_i (debug_req_i), .serial_o (debug_req));
   sync #(.STAGES (2))
@@ -64,9 +68,6 @@ module ${name}_cva6 import ${name}_pkg::*; (
   sync #(.STAGES (2))
     i_sync_irq_1  (.clk_i, .rst_ni, .serial_i (irq_i[1]), .serial_o (irq[1]));
 
-  localparam logic [63:0] BootAddr = 'd${occamy_cfg["peripherals"]["rom"]["address"]};
-
-
   ariane #(
     .ArianeCfg (CVA6OccamyConfig),
     .AxiAddrWidth (${soc_narrow_xbar.in_cva6.aw}),
@@ -82,7 +83,7 @@ module ${name}_cva6 import ${name}_pkg::*; (
   ) i_cva6 (
     .clk_i,
     .rst_ni,
-    .boot_addr_i (BootAddr),
+    .boot_addr_i (cva6_boot_addr),
     .hart_id_i (64'h0),
     .irq_i (irq),
     .ipi_i (ipi),

hw/occamy/occamy_quadrant_s1.sv.tpl

@@ -35,6 +35,7 @@ module ${name}_quadrant_s1
   input  logic                         clk_i,
   input  logic                         rst_ni,
   input  logic                         test_mode_i,
+  input  logic [31:0]                  boot_addr_i,
   input  chip_id_t                     chip_id_i,
   input  logic [NrCoresS1Quadrant-1:0] meip_i,
   input  logic [NrCoresS1Quadrant-1:0] mtip_i,
@@ -241,8 +242,7 @@ module ${name}_quadrant_s1
     .msip_i (msip_i[NrCoresClusterOffset[${i}]+:NrCoresCluster[${i}]]),
     .hart_base_id_i (hart_base_id_${i}),
     .cluster_base_addr_i (cluster_base_addr[${i}]),
-    // Boot Address is fixed to 0x100_0000 for now
-    .boot_addr_i (32'h0100_0000), 
+    .boot_addr_i (boot_addr_i), 
     .narrow_in_req_i (${narrow_cluster_in.req_name()}),
     .narrow_in_resp_o (${narrow_cluster_in.rsp_name()}),
     .narrow_out_req_o  (${narrow_cluster_out.req_name()}),

hw/occamy/occamy_soc.sv.tpl

@@ -42,7 +42,7 @@ module ${name}_soc
   input  logic        clk_i,
   input  logic        rst_ni,
   input  logic        test_mode_i,
-
+  input  logic [${occamy_cfg["addr_width"]-1}:0] boot_addr_i,
   // Peripheral Ports (to AXI-lite Xbar)
   output  ${soc_narrow_xbar.out_periph.req_type()} periph_axi_lite_req_o,
   input   ${soc_narrow_xbar.out_periph.rsp_type()} periph_axi_lite_rsp_i,
@@ -112,6 +112,7 @@ module ${name}_soc
     .ipi_i (msip_i[0]),
     .time_irq_i (mtip_i[0]),
     .debug_req_i (debug_req_i[0]),
+    .boot_addr_i (boot_addr_i),
     .axi_req_o (${cva6_mst.req_name()}),
     .axi_resp_i (${cva6_mst.rsp_name()}),
     .sram_cfg_i (sram_cfgs_i.cva6)
@@ -140,6 +141,7 @@ module ${name}_soc
     .clk_i (clk_i),
     .rst_ni (rst_ni),
     .test_mode_i (test_mode_i),
+    .boot_addr_i (boot_addr_i[31:0]),
     .chip_id_i (8'b0),  // Temporary solution as the Chip ID is not provided yet
     .meip_i ('0),
     .mtip_i (mtip_i[${lower_core + nr_cores_s1_quadrant - 1}:${lower_core}]),

hw/occamy/occamy_top.sv.tpl

@@ -82,6 +82,8 @@ module ${name}_top
 
   ${name}_soc_reg_pkg::${name}_soc_reg2hw_t soc_ctrl_out;
   ${name}_soc_reg_pkg::${name}_soc_hw2reg_t soc_ctrl_in;
+  // System boot address 
+  logic [${occamy_cfg["addr_width"]-1}:0] boot_addr;
   logic [1:0] spm_narrow_rerror;
   logic [1:0] spm_wide_rerror;
 
@@ -121,6 +123,7 @@ module ${name}_top
     .clk_i,
     .rst_ni,
     .test_mode_i,
+    .boot_addr_i           ( boot_addr                   ),
     .periph_axi_lite_req_o ( periph_axi_lite_soc2per_req ),
     .periph_axi_lite_rsp_i ( periph_axi_lite_soc2per_rsp ),
     .periph_axi_lite_req_i ( periph_axi_lite_per2soc_req ),
@@ -324,7 +327,7 @@ module ${name}_top
   /////////////////////
   //   SOC CONTROL   //
   /////////////////////
-
+  
   <% regbus_soc_ctrl = soc_axi_lite_narrow_periph_xbar.out_soc_ctrl \
     .cut(context, cuts_soc_ctrl_cfg, name="soc_axi_lite_narrow_periph_xbar_out_soc_ctrl_cut") \
     .to_reg(context, "axi_lite_to_reg_soc_ctrl") %>
@@ -338,6 +341,7 @@ module ${name}_top
     .reg_rsp_o ( ${regbus_soc_ctrl.rsp_name()} ),
     .reg2hw_o  ( soc_ctrl_out ),
     .hw2reg_i  ( soc_ctrl_in ),
+    .boot_addr_o (boot_addr),
     .event_ecc_rerror_narrow_i(spm_narrow_rerror),
     .event_ecc_rerror_wide_i(spm_wide_rerror),
     .intr_ecc_narrow_uncorrectable_o(irq.ecc_narrow_uncorrectable),

hw/occamy/soc_ctrl/occamy_soc_ctrl.sv → hw/occamy/soc_ctrl/occamy_soc_ctrl.sv.tpl

@@ -3,6 +3,7 @@
 // SPDX-License-Identifier: SHL-0.51
 
 // Author: Florian Zaruba <[email protected]>
+`include "common_cells/registers.svh"
 
 module occamy_soc_ctrl import occamy_soc_reg_pkg::*; #(
   parameter type reg_req_t = logic,
@@ -17,6 +18,8 @@ module occamy_soc_ctrl import occamy_soc_reg_pkg::*; #(
   // To HW
   output occamy_soc_reg2hw_t reg2hw_o, // Write
   input  occamy_soc_hw2reg_t hw2reg_i,
+  // Boot addr
+  output logic [${addr_width - 1}:0] boot_addr_o,
   // Events in
   input logic [1:0] event_ecc_rerror_narrow_i,
   input logic [1:0] event_ecc_rerror_wide_i,
@@ -60,10 +63,23 @@ module occamy_soc_ctrl import occamy_soc_reg_pkg::*; #(
     .rst_ni    ( rst_ni ),
     .reg_req_i ( reg_req_i ),
     .reg_rsp_o ( reg_rsp_o ),
-    .reg2hw    ( reg2hw_o ),
-    .hw2reg    ( hw2reg ),
+    .reg2hw    ( reg2hw_o ), 
+    .hw2reg    ( hw2reg ),   
     .devmode_i ( 1'b1 )
   );
+   // boot address
+  logic [${addr_width-1}:0] boot_addr_d, boot_addr_q;
+  logic [${addr_width-1}:0] boot_addr_init;
+  logic [1:0] boot_mode;
+  assign boot_mode = hw2reg_i.boot_mode.d;
+
+  always_comb begin
+    boot_addr_init = (boot_mode == 2'b00)? ${default_boot_addr}:${backup_boot_addr};
+    boot_addr_d = (boot_mode == 2'b00)? ${default_boot_addr}:${backup_boot_addr};
+    boot_addr_o = boot_addr_q;
+  end
+
+  `FF(boot_addr_q, boot_addr_d, boot_addr_init, clk_i, rst_ni)
 
   prim_intr_hw #(.Width(1)) intr_hw_ecc_narrow_correctable (
     .clk_i,
@@ -117,4 +133,4 @@ module occamy_soc_ctrl import occamy_soc_reg_pkg::*; #(
     .intr_o                 (intr_ecc_wide_uncorrectable_o)
   );
 
-endmodule
+endmodule