Add VCS Multicore Simulation Ability (#87)

* Initial Push * Update Top Makefile to include VCS Option for HeMAiA * Update Top Makefile to include vlt Option for HeMAiA
KULeuven-MICAS · Nov 25, 2024 · d60401e · d60401e
1 parent 98ce374
commit d60401e
Show file tree

Hide file tree

Showing 4 changed files with 20 additions and 5 deletions.
diff --git a/Makefile b/Makefile
@@ -107,6 +107,9 @@ occamy_system_vlt: # In SNAX Docker
 	+$(MAKE) -C ./target/sim tb
 	+$(MAKE) -C ./target/sim bin/occamy_top.vlt
 
+hemaia_system_vlt: # In SNAX Docker
+	+$(MAKE) -C ./target/sim_chip bin/occamy_chip.vlt CFG_OVERRIDE=$(CFG)
+
 # Questasim Workflow
 occamy_system_vsim_preparation: # In SNAX Docker
 	$(MAKE) -C ./target/sim work/lib/libfesvr.a
@@ -121,3 +124,10 @@ hemaia_system_vsim_preparation: # In SNAX Docker
 
 hemaia_system_vsim: # In ESAT Server
 	$(MAKE) -C ./target/sim_chip bin/occamy_chip.vsim
+
+# VCS Workflow
+hemaia_system_vcs_preparation: # In SNAX Docker
+	$(MAKE) -C ./target/sim_chip work-vcs/compile.sh CFG_OVERRIDE=$(CFG)
+
+hemaia_system_vcs: # In ESAT Server
+	$(MAKE) -C ./target/sim_chip bin/occamy_chip.vcs
diff --git a/target/rtl/bootrom/src/bootrom.c b/target/rtl/bootrom/src/bootrom.c
@@ -91,7 +91,7 @@ void bootrom() {
                 }
                 print_str(address_prefix, "\r\n\t The memory from 0x");
                 print_u48(address_prefix, start_address);
-                print_str(address_prefix, "is:");
+                print_str(address_prefix, " is:");
                 print_mem_hex(address_prefix, (char*)start_address,
                               memory_length);
                 print_str(address_prefix, "\r\n\r\n\t Print finished. ");

diff --git a/target/sim_chip/Makefile b/target/sim_chip/Makefile
@@ -81,7 +81,7 @@ VCS_FLAGS += -Mdir=work-vcs
 VCS_FLAGS += -Mlib=work-vcs
 VCS_FLAGS += -full64
 # Multi-core
-VCS_FLAGS += -fgp
+VCS_FLAGS += -fgp=multisocket
 # Debug Options
 VCS_FLAGS += -assert disable_cover
 VCS_FLAGS += -kdb
@@ -334,4 +334,4 @@ help:
 	@echo -e ""
 	@echo -e "Additional useful targets from the included Makefrag:"
 	@echo -e "${Blue}traces         ${Black}Generate the better readable traces in .logs/trace_hart_<hart_id>.txt with spike-dasm."
-	@echo -e "${Blue}annotate       ${Black}Annotate the better readable traces in .logs/trace_hart_<hart_id>.s with the source code related with the retired instructions."
+	@echo -e "${Blue}annotate       ${Black}Annotate the better readable traces in .logs/trace_hart_<hart_id>.s with the source code related with the retired instructions."
diff --git a/target/sim_chip/testharness/testharness.sv.tpl b/target/sim_chip/testharness/testharness.sv.tpl
@@ -30,6 +30,9 @@ module testharness
   // Chip finish signal
   integer chip_finish[${max(x)}:${min(x)}][${max(y)}:${min(y)}];
 
+  // Integer to save current time
+  time current_time;
+
   // Generate reset and clock.
   initial begin
     rtc_i  = 0;
@@ -46,10 +49,12 @@ module testharness
     end
     rst_ni = 1;
     #0;
-    $display("Resetting the system at %tns", $time / 1000);
+    current_time = $time / 1000;
+    $display("Resetting the system at %tns", current_time);
     rst_ni = 0;
     #(10 + $urandom % 10);
-    $display("Reset released at %tns", $time / 1000);
+    current_time = $time / 1000;
+    $display("Reset released at %tns", current_time);
     rst_ni = 1;
   end