New simulation setup + Bootrom Updates (#47)

* Modify cfg files

* Modify Bootrom

* CFG  Update

* Bootrom for simulation environment update for correct address loading and jumping

* Update occamy_cfg

* New simulation setup (not working yet)

* Update Simulation Setup (working for Questasim)

* Update Simulation Setup (Auto stop not implemented yet)

* Update Bootrom+ main hooker for better simulation support

* Bug Fix

* Bug Fix

* Remove RO Cache

Bender.local

@@ -6,4 +6,3 @@ overrides:
   axi:                { path: hw/vendor/pulp_platform_axi                                             }
   common_cells:       { git: https://github.com/pulp-platform/common_cells.git,       version: 1.31.1 }
   register_interface: { git: https://github.com/pulp-platform/register_interface.git, version:  0.4.2 }
-  cluster_icache:     { git:  https://github.com/pulp-platform/cluster_icache.git,    version: =0.1.0 }

Bender.yml

@@ -30,8 +30,8 @@ dependencies:
   opentitan_peripherals:  { path: hw/vendor/pulp_platform_opentitan_peripherals                             }
   register_interface:     { git:  https://github.com/pulp-platform/register_interface.git, version: 0.3.8   }
   snitch_cluster:         { git:  https://github.com/KULeuven-MICAS/snax_cluster.git,      rev:        main }
-  tech_cells_generic:     { git:  https://github.com/pulp-platform/tech_cells_generic.git, rev:     v0.2.11 }
-  cluster_icache:         { git:  https://github.com/pulp-platform/cluster_icache.git,     version: 0.1.0 }
+  tech_cells_generic:     { git:  https://github.com/pulp-platform/tech_cells_generic.git, version: 0.2.13 }
+  cluster_icache:         { git:  https://github.com/KULeuven-MICAS/cluster_icache.git,     rev:  main }
 
 workspace:
   package_links:
@@ -43,13 +43,6 @@ export_include_dirs:
 sources:
   # future
   - hw/future/reg_to_apb.sv
-  # snitch_read_only_cache
-  - hw/snitch_read_only_cache/src/snitch_axi_to_cache.sv
-  - hw/snitch_read_only_cache/src/snitch_read_only_cache.sv
-
-  - target: test
-    files:
-      - hw/snitch_read_only_cache/test/snitch_read_only_cache_tb.sv
 
   # spm_interface
   - files:
@@ -108,11 +101,21 @@ sources:
       - target/rtl/src/occamy_xilinx.sv
 
   # target/sim
-  - target: any(simulation, verilator)
+  - target: any(simulation,simulation_vlt)
     files:
       - target/rtl/test/uartdpi/uartdpi.sv
       - target/rtl/test/testharness.sv
 
+  # target/sim_chip
+  - target: simulation_hemaia
+    files:
+      - target/rtl/test/uartdpi/uartdpi.sv
+      - target/sim_chip/testharness/testharness.sv
+      - target/sim/test/bootrom.sv
+      - target/rtl/src/occamy_chip.sv
+
+
+  # target/*_chip
   - target: any(tapeout, hemaia)
     files:
       - target/rtl/bootrom/bootrom.sv

Makefile

@@ -1,7 +1,8 @@
 .PHONY: clean bootrom sw rtl occamy_ip_vcu128 occamy_ip_vcu128_gui occamy_system_vcu128 \
 		occamy_system_vcu128_gui occamy_system_download_sw open_terminal hemaia_system_vivado_preparation \
 		hemaia_chip_vcu128 hemaia_chip_vcu128_gui hemaia_system_vcu128 hemaia_system_vcu128_gui \
-		occamy_system_vlt occamy_system_vsim_preparation occamy_system_vsim
+		occamy_system_vlt occamy_system_vsim_preparation occamy_system_vsim hemaia_system_vsim_preparation \
+		hemaia_system_vsim
 
 MKFILE_PATH := $(abspath $(lastword $(MAKEFILE_LIST)))
 MKFILE_DIR := $(dir $(MKFILE_PATH))
@@ -15,25 +16,25 @@ clean:
 	$(MAKE) -C ./target/fpga_chip/hemaia_chip/ clean
 	$(MAKE) -C ./target/fpga_chip/hemaia_system/ clean
 	$(MAKE) -C ./target/sim/ clean
+	$(MAKE) -C ./target/sim_chip/ clean
 	$(MAKE) -C ./target/rtl/ clean
 	$(MAKE) -C ./target/fpga/sw clean
 	$(MAKE) -C ./target/tapeout clean
 	rm -rf Bender.lock .bender deps
 	rm -rf ./target/rtl/src/bender_targets.tmp
 
 # Software Generation
-bootrom: # In Occamy Docker
+bootrom: # In SNAX Docker
 # The bootrom used for simulation (light-weight bootrom)
 	$(MAKE) -C ./target/sim bootrom CFG_OVERRIDE=$(CFG)
 
 # The bootrom used for tapeout / FPGA prototyping (embedded real rom, full-functional bootrom with different frequency settings)
 	$(MAKE) -C ./target/rtl/bootrom bootrom CFG_OVERRIDE=$(CFG)
 
-sw: # In Occamy Docker
+sw: # In SNAX Docker
 	+$(MAKE) -C ./target/sim sw CFG_OVERRIDE=$(CFG)
 
 # The software from simulation and FPGA prototyping comes from one source. 
-# If we intend to download the sodtware to FPGA, the bin should be extracted from elf by objcopy in Occamy docker. 
 
 # Hardware Generation
 rtl: # In SNAX Docker
@@ -96,9 +97,6 @@ hemaia_chip_vivado_gui: # In ESAT Server
 hemaia_system_vivado: hemaia_chip_vivado # In ESAT Server
 	$(MAKE) -C ./target/fpga_chip/hemaia_system hemaia_system
 
-hemaia_system_vcu128_gui: # In ESAT Server
-	sh -c "cd ./target/fpga_chip/hemaia_system/hemaia_system_vcu128/;vivado hemaia_system_vcu128.xpr"
-
 hemaia_system_vivado_gui: # In ESAT Server
 	sh -c "cd ./target/fpga_chip/hemaia_system/hemaia_system/;vivado hemaia_system.xpr"
 
@@ -118,6 +116,8 @@ occamy_system_vsim_preparation: # In SNAX Docker
 occamy_system_vsim: # In ESAT Server
 	$(MAKE) -C ./target/sim bin/occamy_top.vsim
 
-debug-info:
-	@echo "CFG_OVERRIDE: $(CFG_OVERRIDE)"
-	@echo "CFG: $(CFG)"
+hemaia_system_vsim_preparation: # In SNAX Docker
+	$(MAKE) -C ./target/sim_chip work-vsim/compile.vsim.tcl
+
+hemaia_system_vsim: # In ESAT Server
+	$(MAKE) -C ./target/sim_chip bin/occamy_chip.vsim

hw/occamy/occamy_chip.sv.tpl

@@ -6,8 +6,6 @@
 //
 // AUTOMATICALLY GENERATED by genoccamy.py; edit the script instead.
 
-`include "axi_flat.sv"
-
 module ${name}_chip
 import ${name}_pkg::*;
  (