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#pragma once | ||
#include <stdint.h> | ||
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inline uint8_t get_current_chip_id() { | ||
uint32_t chip_id; | ||
# if __riscv_xlen == 64 | ||
// 64-bit system (CVA6), get chip_id from 0xf15 | ||
asm volatile("csrr %0, 0xf15" : "=r"(chip_id)); | ||
# else | ||
// 32-bit system, get chip_id from 0xbc2 (base_addrh) | ||
// and shift it to the right by 8 bits | ||
asm volatile ("csrr %0, 0xbc2" : "=r"(chip_id)); | ||
chip_id = chip_id >> 8; | ||
# endif | ||
return (uint8_t)chip_id; | ||
} | ||
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inline uint8_t *get_current_chip_baseaddress() { | ||
#if __riscv_xlen == 64 | ||
// 64-bit system (CVA6), get chip_id from 0xf15 | ||
uint32_t chip_id; | ||
asm volatile("csrr %0, 0xf15" : "=r"(chip_id)); | ||
return (uint8_t *)((uintptr_t)chip_id << 40); | ||
#else | ||
// 32-bit system, return 0 (not supported) | ||
return (uint8_t *)0; | ||
#endif | ||
} | ||
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inline uint8_t *get_chip_baseaddress(uint8_t chip_id) { | ||
#if __riscv_xlen == 64 | ||
// 64-bit system, perform the shift and return the base address | ||
return (uint8_t *)((uintptr_t)chip_id << 40); | ||
#else | ||
// 32-bit system, return 0 (not supported) | ||
return (uint8_t *)0; | ||
#endif | ||
} | ||
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inline uint32_t get_current_chip_baseaddress_h() { | ||
uint32_t chip_id = get_current_chip_id(); | ||
return (uint32_t)(chip_id << 8); | ||
} |
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// Copyright 2022 ETH Zurich and University of Bologna. | ||
// Licensed under the Apache License, Version 2.0, see LICENSE for details. | ||
// SPDX-License-Identifier: Apache-2.0 | ||
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// Generated register defines for idma_reg64_frontend | ||
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#ifndef _IDMA_REG64_FRONTEND_REG_DEFS_ | ||
#define _IDMA_REG64_FRONTEND_REG_DEFS_ | ||
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#ifdef __cplusplus | ||
extern "C" { | ||
#endif | ||
// Register width | ||
#define IDMA_REG64_FRONTEND_PARAM_REG_WIDTH 64 | ||
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// Source Address | ||
#define IDMA_REG64_FRONTEND_SRC_ADDR_REG_OFFSET 0x0 | ||
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// Destination Address | ||
#define IDMA_REG64_FRONTEND_DST_ADDR_REG_OFFSET 0x8 | ||
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// Number of bytes | ||
#define IDMA_REG64_FRONTEND_NUM_BYTES_REG_OFFSET 0x10 | ||
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// Configuration Register for DMA settings | ||
#define IDMA_REG64_FRONTEND_CONF_REG_OFFSET 0x18 | ||
#define IDMA_REG64_FRONTEND_CONF_DECOUPLE_BIT 0 | ||
#define IDMA_REG64_FRONTEND_CONF_DEBURST_BIT 1 | ||
#define IDMA_REG64_FRONTEND_CONF_SERIALIZE_BIT 2 | ||
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// DMA Status | ||
#define IDMA_REG64_FRONTEND_STATUS_REG_OFFSET 0x20 | ||
#define IDMA_REG64_FRONTEND_STATUS_BUSY_BIT 0 | ||
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// Next ID, launches transfer, returns 0 if transfer not set up properly. | ||
#define IDMA_REG64_FRONTEND_NEXT_ID_REG_OFFSET 0x28 | ||
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// Get ID of finished transactions. | ||
#define IDMA_REG64_FRONTEND_DONE_REG_OFFSET 0x30 | ||
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#ifdef __cplusplus | ||
} // extern "C" | ||
#endif | ||
#endif // _IDMA_REG64_FRONTEND_REG_DEFS_ | ||
// End generated register defines for idma_reg64_frontend | ||
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#include <stdint.h> | ||
#include "chip_id.h" | ||
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#define SYS_IDMA_CFG_BASE_ADDR 0x11000000 | ||
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#define IDMA_SRC_ADDR \ | ||
(SYS_IDMA_CFG_BASE_ADDR + IDMA_REG64_FRONTEND_SRC_ADDR_REG_OFFSET) | ||
#define IDMA_DST_ADDR \ | ||
(SYS_IDMA_CFG_BASE_ADDR + IDMA_REG64_FRONTEND_DST_ADDR_REG_OFFSET) | ||
#define IDMA_NUMBYTES_ADDR \ | ||
(SYS_IDMA_CFG_BASE_ADDR + IDMA_REG64_FRONTEND_NUM_BYTES_REG_OFFSET) | ||
#define IDMA_CONF_ADDR \ | ||
(SYS_IDMA_CFG_BASE_ADDR + IDMA_REG64_FRONTEND_CONF_REG_OFFSET) | ||
#define IDMA_STATUS_ADDR \ | ||
(SYS_IDMA_CFG_BASE_ADDR + IDMA_REG64_FRONTEND_STATUS_REG_OFFSET) | ||
#define IDMA_NEXTID_ADDR \ | ||
(SYS_IDMA_CFG_BASE_ADDR + IDMA_REG64_FRONTEND_NEXT_ID_REG_OFFSET) | ||
#define IDMA_DONE_ADDR \ | ||
(SYS_IDMA_CFG_BASE_ADDR + IDMA_REG64_FRONTEND_DONE_REG_OFFSET) | ||
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#define IDMA_CONF_DECOUPLE 0 | ||
#define IDMA_CONF_DEBURST 0 | ||
#define IDMA_CONF_SERIALIZE 0 | ||
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static inline volatile uint64_t *sys_dma_src_ptr(void) { | ||
return (volatile uint64_t *)(IDMA_SRC_ADDR | | ||
(uintptr_t)get_current_chip_baseaddress()); | ||
} | ||
static inline volatile uint64_t *sys_dma_dst_ptr(void) { | ||
return (volatile uint64_t *)(IDMA_DST_ADDR | | ||
(uintptr_t)get_current_chip_baseaddress()); | ||
} | ||
static inline volatile uint64_t *sys_dma_num_bytes_ptr(void) { | ||
return (volatile uint64_t *)(IDMA_NUMBYTES_ADDR | | ||
(uintptr_t)get_current_chip_baseaddress()); | ||
} | ||
static inline volatile uint64_t *sys_dma_conf_ptr(void) { | ||
return (volatile uint64_t *)(IDMA_CONF_ADDR | | ||
(uintptr_t)get_current_chip_baseaddress()); | ||
} | ||
static inline volatile uint64_t *sys_dma_status_ptr(void) { | ||
return (volatile uint64_t *)(IDMA_STATUS_ADDR | | ||
(uintptr_t)get_current_chip_baseaddress()); | ||
} | ||
static inline volatile uint64_t *sys_dma_nextid_ptr(void) { | ||
return (volatile uint64_t *)(IDMA_NEXTID_ADDR | | ||
(uintptr_t)get_current_chip_baseaddress()); | ||
} | ||
static inline volatile uint64_t *sys_dma_done_ptr(void) { | ||
return (volatile uint64_t *)(IDMA_DONE_ADDR | | ||
(uintptr_t)get_current_chip_baseaddress()); | ||
} | ||
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static inline uint64_t sys_dma_memcpy(uint64_t dst, uint64_t src, uint64_t size) { | ||
*(sys_dma_src_ptr()) = (uint64_t)src; | ||
*(sys_dma_dst_ptr()) = (uint64_t)dst; | ||
*(sys_dma_num_bytes_ptr()) = size; | ||
*(sys_dma_conf_ptr()) = | ||
(IDMA_CONF_DECOUPLE << IDMA_REG64_FRONTEND_CONF_DECOUPLE_BIT) | | ||
(IDMA_CONF_DEBURST << IDMA_REG64_FRONTEND_CONF_DEBURST_BIT) | | ||
(IDMA_CONF_SERIALIZE << IDMA_REG64_FRONTEND_CONF_SERIALIZE_BIT); | ||
return *(sys_dma_nextid_ptr()); | ||
} | ||
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static inline void sys_dma_blk_memcpy(uint64_t dst, uint64_t src, uint64_t size) { | ||
volatile uint64_t tf_id = sys_dma_memcpy(dst, src, size); | ||
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while (*(sys_dma_done_ptr()) != tf_id) { | ||
asm volatile("nop"); | ||
} | ||
} |