Fix bootrom cache incoherence (#33)

* Add cache flush at the end of loading binary; change back to write back cache * Update occamy xdc * Bug Fix * Update pre-compiled bootrom and send_uart.sh
KULeuven-MICAS · Sep 11, 2024 · 2697028 · 2697028
1 parent 7a8976e
commit 2697028
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Showing 9 changed files with 405 additions and 389 deletions.
diff --git a/hw/vendor/openhwgroup_cva6/Bender.yml b/hw/vendor/openhwgroup_cva6/Bender.yml
@@ -15,7 +15,7 @@ frozen: true
 
 sources:
   - defines:
-      WT_DCACHE: 1
+      WB_DCACHE: 1
     files:
       - target: cv64a6_imafdc_sv39
         files:

diff --git a/target/fpga/bootrom/src/bootrom.c b/target/fpga/bootrom/src/bootrom.c
@@ -63,6 +63,10 @@ void delay_cycles(uint64_t cycle) {
     }
 }
 
+inline void flush_cache() {
+    asm volatile("fence.i" ::: "memory");
+}
+
 void uart_xmodem(uint64_t start_address) {
     uint8_t received_char;
     bool transmission_end = false;
@@ -111,9 +115,11 @@ void uart_xmodem(uint64_t start_address) {
                 write_serial(NAK); // Packet number error
             }
         } else {
-            write_serial(CAN); // Unexpected byte received
+            write_serial(CAN);  // Unexpected byte received
         }
     }
+
+    flush_cache();              // Flush the cache to avoid inconsistency
 }
 
 // Boot modes.
@@ -130,7 +136,7 @@ void bootrom() {
     while (1) {
         start_address = 0x80000000;
         print_uart("\033[2J");
-        print_uart("\r\n\t\t Welcome to Occamy Bootrom");
+        print_uart("\r\n\t\t Welcome to HeMAiA Bootrom");
         print_uart("\r\n");
         print_uart("\r\n\t Enter the number to select the mode: ");
         print_uart("\r\n\t 1. Load from JTAG\r\n\t 2. Load from UART to 0x80000000\r\n\t 3. Print memory from 0x80000000\r\n\t 4. Continue to Boot from 0x80000000");

diff --git a/target/fpga/bootrom/src/uart.h b/target/fpga/bootrom/src/uart.h
@@ -106,7 +106,7 @@ inline static void print_uart(const char *str) {
 inline static void print_uart_hex(char *str, uint32_t length) {
     uint8_t lut[16] = {'0', '1', '2', '3', '4', '5', '6', '7',
                        '8', '9', 'A', 'B', 'C', 'D', 'E', 'F'};
-    for (uint32_t i = 0; i < length; i++) {
+    for (uint64_t i = (uint64_t)str; i < (uint64_t)str + length; i++) {
         if (i % 16 == 0) {
             write_serial('\r');
             write_serial('\n');
@@ -115,7 +115,7 @@ inline static void print_uart_hex(char *str, uint32_t length) {
             write_serial(' ');
 
         }
-        char temp = str[i];
+        char temp = *((char *)i);
         write_serial(lut[temp / 16]);
         write_serial(lut[temp % 16]);
         write_serial(' ');

diff --git a/target/fpga/occamy_vcu128_impl.xdc b/target/fpga/occamy_vcu128_impl.xdc
@@ -17,36 +17,36 @@ set_property PACKAGE_PIN BP23 [get_ports uart_rts_no_0]
 set_property IOSTANDARD LVCMOS18 [get_ports uart_rts_no_0]
 
 # Six-wires SPIx4
-# FMCP_HSPC_LA12_P
-set_property PACKAGE_PIN J22 [get_ports spim_sd_io[0]]
+# LA10_P - B23
+set_property PACKAGE_PIN B23 [get_ports spim_sd_io[0]]
 set_property IOSTANDARD LVCMOS18 [get_ports spim_sd_io[0]]
-# FMCP_HSPC LA12_N
-set_property PACKAGE_PIN H22 [get_ports spim_sd_io[1]]
+# LA10_N - A23
+set_property PACKAGE_PIN A23 [get_ports spim_sd_io[1]]
 set_property IOSTANDARD LVCMOS18 [get_ports spim_sd_io[1]]
-# FMCP_HSPC LA16_P
-set_property PACKAGE_PIN K24 [get_ports spim_sd_io[2]]
+# LA11_P - B26
+set_property PACKAGE_PIN B26 [get_ports spim_sd_io[2]]
 set_property IOSTANDARD LVCMOS18 [get_ports spim_sd_io[2]]
-# FMCP_HSPC_LA16_N
-set_property PACKAGE_PIN K23 [get_ports spim_sd_io[3]]
+# LA11_N - B25
+set_property PACKAGE_PIN B25 [get_ports spim_sd_io[3]]
 set_property IOSTANDARD LVCMOS18 [get_ports spim_sd_io[3]]
-# FMCP_HSPC_LA20_P
-set_property PACKAGE_PIN A21 [get_ports spim_csb_o[0]]
+# LA12_P - J22
+set_property PACKAGE_PIN J22 [get_ports spim_csb_o[0]]
 set_property IOSTANDARD LVCMOS18 [get_ports spim_csb_o[0]]
-# FMCP_HSPC_LA20_N
-set_property PACKAGE_PIN A20 [get_ports spim_csb_o[1]]
+# LA12_N - H22
+set_property PACKAGE_PIN H22 [get_ports spim_csb_o[1]]
 set_property IOSTANDARD LVCMOS18 [get_ports spim_csb_o[1]]
-# FMCP_HSPC_LA22_P
-set_property PACKAGE_PIN B16 [get_ports spim_sck_o]
+# LA13_P - A25
+set_property PACKAGE_PIN A25 [get_ports spim_sck_o]
 set_property IOSTANDARD LVCMOS18 [get_ports spim_sck_o]
 
 create_clock -period 10.000 -name spi_m_sck [get_ports spim_sck_o]
 
 # Two-wires I2C
-# FMCP_HSPC_LA13_P
-set_property PACKAGE_PIN A25 [get_ports i2c_sda_io]
+# LA14_P - C23
+set_property PACKAGE_PIN C23 [get_ports i2c_sda_io]
 set_property IOSTANDARD LVCMOS18 [get_ports i2c_sda_io]
-# FMCP_HSPC_LA13_N
-set_property PACKAGE_PIN A24 [get_ports i2c_scl_io]
+# LA14_N - B22
+set_property PACKAGE_PIN B22 [get_ports i2c_scl_io]
 set_property IOSTANDARD LVCMOS18 [get_ports i2c_scl_io]
 
 # Eight-wires GPIO_O connected to LEDs

diff --git a/target/fpga/occamy_vcu128_impl_ext_jtag.xdc b/target/fpga/occamy_vcu128_impl_ext_jtag.xdc
@@ -24,21 +24,25 @@ set_max_delay -to   [get_ports { jtag_tdo_o }] 20
 set_max_delay -from [get_ports { jtag_tms_i }] 20
 set_max_delay -from [get_ports { jtag_tdi_i }] 20
 
-# C23 - C18 (FMCP_HSPC_LA14_P) - J1.02 - VDD
-set_property PACKAGE_PIN C23     [get_ports jtag_vdd_o]
+# 1: LA20_P - A21
+set_property PACKAGE_PIN A21     [get_ports jtag_vdd_o]
 set_property IOSTANDARD LVCMOS18 [get_ports jtag_vdd_o]
-# B22 - C19 (FMCP_HSPC_LA14_N) - J1.04 - GND
-set_property PACKAGE_PIN B22     [get_ports jtag_gnd_o]
+set_property DRIVE 12            [get_ports jtag_vdd_o]
+
+# 0: LA20_N - A20
+set_property PACKAGE_PIN A20     [get_ports jtag_gnd_o]
 set_property IOSTANDARD LVCMOS18 [get_ports jtag_gnd_o]
-# E19 - C22 (FMCP_HSPC_LA18_CC_P) - J1.06 - TCK
-set_property PACKAGE_PIN E19     [get_ports jtag_tck_i]
+set_property DRIVE 12            [get_ports jtag_gnd_o]
+
+# LA24P - C18
+set_property PACKAGE_PIN C18     [get_ports jtag_tck_i]
 set_property IOSTANDARD LVCMOS18 [get_ports jtag_tck_i]
-# E18 - C23 (FMCP_HSPC_LA19_CC_N) - J1.08 - TDO
-set_property PACKAGE_PIN E18     [get_ports jtag_tdo_o]
-set_property IOSTANDARD LVCMOS18 [get_ports jtag_tdo_o]
-# E21 - C26 (FMCP_HSPC_LA27_P) - J1.10 - TDI
-set_property PACKAGE_PIN E21     [get_ports jtag_tdi_i]
+# LA24N - C17
+set_property PACKAGE_PIN C17     [get_ports jtag_tdi_i]
 set_property IOSTANDARD LVCMOS18 [get_ports jtag_tdi_i]
-# D21 - C27 (FMCP_HSPC_LA27_N) - J1.12 - TNS
-set_property PACKAGE_PIN D21     [get_ports jtag_tms_i]
+# LA25P - D20
+set_property PACKAGE_PIN D20     [get_ports jtag_tdo_o]
+set_property IOSTANDARD LVCMOS18 [get_ports jtag_tdo_o]
+# LA25N - D19
+set_property PACKAGE_PIN D19     [get_ports jtag_tms_i]
 set_property IOSTANDARD LVCMOS18 [get_ports jtag_tms_i]
diff --git a/target/fpga/sw/send_uart.sh b/target/fpga/sw/send_uart.sh
@@ -11,10 +11,10 @@ else
 		FILE=$1
 	fi
 
-	stty -F /dev/ttyUSB3 cs8 1000000 ignbrk -brkint -imaxbel -opost -onlcr -isig -icanon -iexten -echo -echoe -echok -echoctl -echoke noflsh -ixon crtscts
+	stty -F /dev/ttyUSB1 cs8 1000000 ignbrk -brkint -imaxbel -opost -onlcr -isig -icanon -iexten -echo -echoe -echok -echoctl -echoke noflsh -ixon crtscts
 
-	echo -n 2 > /dev/ttyUSB3
+	echo -n 2 > /dev/ttyUSB1
 
-	sx -k "$FILE" < /dev/ttyUSB3 > /dev/ttyUSB3
+	sx -k "$FILE" < /dev/ttyUSB1 > /dev/ttyUSB1
 
 fi