Add DIMC and CGRA blocks #116

	# Copyright 2024 KU Leuven.
	# Licensed under the Apache License, Version 2.0, see LICENSE for details.
	# SPDX-License-Identifier: Apache-2.0

	# Yunhao Deng <[email protected]>

	# Run functional regression checks
	name: ci
	on:
	pull_request:
	push:
	branches: [main]
	jobs:

	########
	# Docs #
	########

	# docs:
	# name: Build documentation
	# runs-on: ubuntu-22.04
	# container:
	# image: ghcr.io/pulp-platform/occamy:main
	# steps:
	# - uses: actions/checkout@v2
	# - name: Build docs
	# run: \|
	# bender update && bender checkout
	# mkdocs build

	#################################################
	# Occamy System Software + Hardware Compilation #
	#################################################

	occamy-verilator:
	name: Simulation with Verilator
	runs-on: ubuntu-22.04
	container:
	image: ghcr.io/kuleuven-micas/snax:main
	steps:
	- uses: actions/checkout@v2
	with:
	submodules: 'recursive'
	# Sorry, need this for Hypercorex
	- name: Install Python Dependencies
	run: \|
	pip install tqdm matplotlib
	- name: Compile Bootrom
	run: \|
	echo "Compiling Bootrom"
	make bootrom
	- name: Compile SW
	run: \|
	echo "Compiling SW"
	make sw CFG_OVERRIDE=target/sw/cfg/occamy_cfg/hemaia.hjson -j$(nproc)
	- name: Compile RTL
	run: \|
	make rtl CFG_OVERRIDE=target/rtl/cfg/occamy_cfg/hemaia.hjson
	- name: Compile Verilator Binary
	run: \|
	make occamy_system_vlt -j$(nproc)
	- name: Run Tests
	working-directory: target/sim
	run: \|-
	./run.py --simulator verilator \
	sw/sim_elf.yaml -j

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