Merge pull request openhwgroup#1729 from zchamski/cvvdev/dev/test-ter…

…mination-no-finish-calls UVM test termination: Use end-of-test output of RVFI tracer iso. $finish.
Gchauvon · Mar 21, 2023 · 712747c · 712747c
2 parents d4de7a3 + 66c3ac6
commit 712747c
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Showing 6 changed files with 26 additions and 12 deletions.
diff --git a/cva6/env/uvme/uvma_cva6_core_cntrl_agent.sv b/cva6/env/uvme/uvma_cva6_core_cntrl_agent.sv
@@ -107,7 +107,7 @@ endtask : run_phase
 
 task uvma_cva6_core_cntrl_agent_c::start_fetch_toggle_seq();
 
-      `uvm_error(log_tag, "fetch toggle not supported in CVA6");
+      `uvm_warning(log_tag, "fetch toggle not supported in CVA6");
 
 endtask : start_fetch_toggle_seq
 

diff --git a/cva6/tb/uvmt/cva6_tb_wrapper.sv b/cva6/tb/uvmt/cva6_tb_wrapper.sv
@@ -46,7 +46,7 @@ module cva6_tb_wrapper
   input  logic                         clk_i,
   input  logic                         rst_ni,
   input  logic [XLEN-1:0]              boot_addr_i,
-  output wire                          tb_exit_o,
+  output logic [31:0]                  tb_exit_o,
   output ariane_rvfi_pkg::rvfi_port_t  rvfi_o,
   input  cvxif_pkg::cvxif_resp_t       cvxif_resp,
   output cvxif_pkg::cvxif_req_t        cvxif_req,
@@ -92,7 +92,8 @@ module cva6_tb_wrapper
   ) rvfi_tracer_i (
     .clk_i(clk_i),
     .rst_ni(rst_ni),
-    .rvfi_i(rvfi)
+    .rvfi_i(rvfi),
+    .end_of_test_o(tb_exit_o)
   ) ;
 
   //----------------------------------------------------------------------------

diff --git a/cva6/tb/uvmt/uvmt_cva6_dut_wrap.sv b/cva6/tb/uvmt/uvmt_cva6_dut_wrap.sv
@@ -26,7 +26,7 @@ module uvmt_cva6_dut_wrap # ( parameter int unsigned AXI_USER_WIDTH    = 1,
                             uvma_cvxif_intf                     cvxif_if,
                             uvma_axi_intf                       axi_if,
                             uvme_cva6_core_cntrl_if             core_cntrl_if,
-                            output wire                         tb_exit_o,
+                            output logic[31:0]                  tb_exit_o,
                             output ariane_rvfi_pkg::rvfi_port_t rvfi_o
                            );
 

diff --git a/cva6/tb/uvmt/uvmt_cva6_tb.sv b/cva6/tb/uvmt/uvmt_cva6_tb.sv
@@ -67,7 +67,8 @@ module uvmt_cva6_tb;
                                            );
    // DUT Wrapper Interfaces
    uvmt_rvfi_if                     rvfi_if(
-                                                 .rvfi_o()
+                                                 .rvfi_o(),
+                                                 .tb_exit_o()
                                                  ); // Status information generated by the Virtual Peripherals in the DUT WRAPPER memory.
 
   /**
@@ -85,7 +86,7 @@ module uvmt_cva6_tb;
                     .cvxif_if  (cvxif_if),
                     .axi_if    (axi_if),
                     .core_cntrl_if(core_cntrl_if),
-                    .tb_exit_o(),
+                    .tb_exit_o(rvfi_if.tb_exit_o),
                     .rvfi_o(rvfi_if.rvfi_o)
                     );
 
@@ -128,6 +129,7 @@ module uvmt_cva6_tb;
       int                warning_count;
       int                fatal_count;
       static bit         sim_finished = 0;
+      static int         test_exit_code = 0;
 
       static string  red   = "\033[31m\033[1m";
       static string  green = "\033[32m\033[1m";
@@ -139,10 +141,11 @@ module uvmt_cva6_tb;
       fatal_count   = rs.get_severity_count(UVM_FATAL);
 
       void'(uvm_config_db#(bit)::get(null, "", "sim_finished", sim_finished));
+      void'(uvm_config_db#(int)::get(null, "", "test_exit_code", test_exit_code));
 
       $display("\n%m: *** Test Summary ***\n");
 
-      if (sim_finished && (err_count == 0) && (fatal_count == 0)) begin
+      if (sim_finished && (test_exit_code == 0) && (err_count == 0) && (fatal_count == 0)) begin
          $display("    PPPPPPP    AAAAAA    SSSSSS    SSSSSS   EEEEEEEE  DDDDDDD     ");
          $display("    PP    PP  AA    AA  SS    SS  SS    SS  EE        DD    DD    ");
          $display("    PP    PP  AA    AA  SS        SS        EE        DD    DD    ");
@@ -157,6 +160,7 @@ module uvmt_cva6_tb;
          else begin
            $display("                 SIMULATION PASSED with WARNINGS              ");
          end
+         $display("                 test exit code = %0d (0x%h)", test_exit_code, test_exit_code);
          $display("    ----------------------------------------------------------");
       end
       else begin
@@ -173,6 +177,7 @@ module uvmt_cva6_tb;
          end
          else begin
             $display("                       SIMULATION FAILED                    ");
+            $display("                 test exit code = %0d (0x%h)", test_exit_code, test_exit_code);
          end
          $display("    ----------------------------------------------------------");
       end

diff --git a/cva6/tb/uvmt/uvmt_cva6_tb_ifs.sv b/cva6/tb/uvmt/uvmt_cva6_tb_ifs.sv
@@ -22,7 +22,8 @@
 
 
 interface uvmt_rvfi_if (
-                    output ariane_rvfi_pkg::rvfi_port_t  rvfi_o
+                    output ariane_rvfi_pkg::rvfi_port_t  rvfi_o,
+                    output logic[31:0] tb_exit_o
                                  );
 
   import uvm_pkg::*;

diff --git a/cva6/tests/uvmt/compliance-tests/uvmt_cva6_firmware_test.sv b/cva6/tests/uvmt/compliance-tests/uvmt_cva6_firmware_test.sv
@@ -144,13 +144,20 @@ task uvmt_cva6_firmware_test_c::run_phase(uvm_phase phase);
    @(posedge env_cntxt.clknrst_cntxt.vif.reset_n);
    repeat (33) @(posedge env_cntxt.clknrst_cntxt.vif.clk);
    `uvm_info("TEST", "Started RUN", UVM_NONE)
-   // The firmware is expected to write exit status and pass/fail indication to the Virtual Peripheral
+   // The firmware is expected to write exit status and pass/fail indication to the Virtual Peripheral.
+   // The format of rvfi_vif.tb_exit_o is { wire[31:1] exit_code, wire test_finished }.
    wait (
-          (rvfi_vif.rvfi_o[0].halt       == 1'b1) ||
-          (rvfi_vif.rvfi_o[1].halt       == 1'b1)
+          (rvfi_vif.tb_exit_o[0]     == 1'b1)
         );
-   repeat (100) @(posedge env_cntxt.clknrst_cntxt.vif.clk);
+   `uvm_info("TEST", "Test FINISHED", UVM_NONE)
+   // Set sim_finished (otherwise tb will flag that sim was aborted)
+   uvm_config_db#(bit)::set(null, "", "sim_finished", 1);
+   uvm_config_db#(int)::set(null, "", "test_exit_code", { 0'b0, rvfi_vif.tb_exit_o[31:1] });
+   // Let the termination-triggering instruction appear in the log.
+   @(posedge env_cntxt.clknrst_cntxt.vif.clk);
+   // Allow termination from now on.
    phase.drop_objection(this);
+   repeat (100) @(posedge env_cntxt.clknrst_cntxt.vif.clk);
 
 endtask : run_phase