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fix: mt8183 actually boots now(?)
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june-fish committed Feb 17, 2024
1 parent 08f2e25 commit 38fe947
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39 changes: 39 additions & 0 deletions mt8183/01-arm64-dts-mediatek-mt8183-Add-missing-GPU-clocks.patch
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From d5327028da2f2c7ff90133b57fa2fbb3bb23a760 Mon Sep 17 00:00:00 2001
From: Alicja Michalska <[email protected]>
Date: Sun, 26 Nov 2023 14:44:30 +0100
Subject: [PATCH] arm64: dts: mediatek: mt8183: Add missing GPU clocks

Signed-off-by: Alicja Michalska <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 2c5665e695d2..352363db7481 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -1761,7 +1761,20 @@ gpu: gpu@13040000 {
<GIC_SPI 278 IRQ_TYPE_LEVEL_LOW>;
interrupt-names = "job", "mmu", "gpu";

- clocks = <&mfgcfg CLK_MFG_BG3D>;
+ clocks =
+ <&topckgen CLK_TOP_MFGPLL_CK>,
+ <&topckgen CLK_TOP_MUX_MFG>,
+ <&clk26m>,
+ <&mfgcfg CLK_MFG_BG3D>;
+ clock-names =
+ "clk_main_parent",
+ "clk_mux",
+ "clk_sub_parent",
+ "subsys_mfg_cg";
+
+ #cooling-cells = <2>;
+ cooling-min-level = <0>;
+ cooling-max-level = <15>;

power-domains =
<&spm MT8183_POWER_DOMAIN_MFG_CORE0>,
--
2.43.0

25 changes: 25 additions & 0 deletions mt8183/02-arm64-dts-mediatek-mt8183-Add-missing-syscon-power-d.patch
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From 9a42e6ea802f31e439c92516cd959f0a0ade020d Mon Sep 17 00:00:00 2001
From: Alicja Michalska <[email protected]>
Date: Sun, 26 Nov 2023 14:38:06 +0100
Subject: [PATCH] arm64: dts: mediatek: mt8183: Add missing syscon power domain

Signed-off-by: Alicja Michalska <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 1 +
1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 5169779d01df..2c5665e695d2 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -1749,6 +1749,7 @@ mfgcfg: syscon@13000000 {
compatible = "mediatek,mt8183-mfgcfg", "syscon";
reg = <0 0x13000000 0 0x1000>;
#clock-cells = <1>;
+ power-domains = <&spm MT8183_POWER_DOMAIN_MFG_ASYNC>;
};

gpu: gpu@13040000 {
--
2.43.0

84 changes: 84 additions & 0 deletions mt8183/03-arm64-dts-mediatek-mt8183-Add-video-encoder-decoder.patch
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From 78cddd6de764caacd120df44fc5cb6939e684628 Mon Sep 17 00:00:00 2001
From: Alicja Michalska <[email protected]>
Date: Sun, 26 Nov 2023 18:24:44 +0100
Subject: [PATCH] arm64: dts: mediatek: mt8183: Add video encoder/decoder

Clock names should be set correctly according to documentation in
Linux's dt-bindings, although they differ from ChromeOS.

This should enable hardware video encoders and decoders to work.

Signed-off-by: Alicja Michalska <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 48 ++++++++++++++++++++++++
1 file changed, 48 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 6caf5a619379..f80e0378a0d2 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -2121,6 +2121,35 @@ vdecsys: syscon@16000000 {
#clock-cells = <1>;
};

+ vcodec_dec: vcodec@16000000 {
+ compatible = "mediatek,mt8183-vcodec-dec";
+ reg = <0 0x16000000 0 0x1000>, /* VDEC_SYS */
+ <0 0x16020000 0 0x1000>, /* VDEC_MISC */
+ <0 0x16021000 0 0x800>, /* VDEC_VLD */
+ <0 0x16021800 0 0x800>, /* VDEC_TOP */
+ <0 0x16022000 0 0x1000>, /* VDEC_MC */
+ <0 0x16023000 0 0x1000>, /* VDEC_AVCVLD */
+ <0 0x16024000 0 0x1000>, /* VDEC_AVCMV */
+ <0 0x16025000 0 0x1000>, /* VDEC_PP */
+ <0 0x16026800 0 0x800>, /* VP8_VD */
+ <0 0x16027000 0 0x800>, /* VP6_VD */
+ <0 0x16027800 0 0x800>, /* VP8_VL */
+ <0 0x16028400 0 0x400>; /* VP9_VD */
+ interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_LOW>;
+ mediatek,larb = <&larb1>;
+ iommus = <&iommu M4U_PORT_HW_VDEC_MC_EXT>,
+ <&iommu M4U_PORT_HW_VDEC_PP_EXT>,
+ <&iommu M4U_PORT_HW_VDEC_VLD_EXT>,
+ <&iommu M4U_PORT_HW_VDEC_AVC_MV_EXT>,
+ <&iommu M4U_PORT_HW_VDEC_PRED_RD_EXT>,
+ <&iommu M4U_PORT_HW_VDEC_PRED_WR_EXT>,
+ <&iommu M4U_PORT_HW_VDEC_PPWRAP_EXT>;
+ mediatek,scp = <&scp>;
+ power-domains = <&spm MT8183_POWER_DOMAIN_VDEC>;
+ clocks = <&vdecsys CLK_VDEC_VDEC>;
+ clock-names = "vdec";
+ };
+
larb1: larb@16010000 {
compatible = "mediatek,mt8183-smi-larb";
reg = <0 0x16010000 0 0x1000>;
@@ -2157,6 +2186,25 @@ venc_jpg: venc_jpg@17030000 {
clock-names = "jpgenc";
};

+ vcodec_enc: vcodec@17020000 {
+ compatible = "mediatek,mt8183-vcodec-enc";
+ reg = <0 0x17020000 0 0x1000>,
+ <0 0x17000000 0 0x1000>; /* Dummy?! */
+ interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_LOW>;
+ mediatek,larb = <&larb4>;
+ iommus = <&iommu M4U_PORT_VENC_REC>,
+ <&iommu M4U_PORT_VENC_BSDMA>,
+ <&iommu M4U_PORT_VENC_RD_COMV>,
+ <&iommu M4U_PORT_VENC_CUR_LUMA>,
+ <&iommu M4U_PORT_VENC_CUR_CHROMA>,
+ <&iommu M4U_PORT_VENC_REF_LUMA>,
+ <&iommu M4U_PORT_VENC_REF_CHROMA>;
+ mediatek,scp = <&scp>;
+ power-domains = <&spm MT8183_POWER_DOMAIN_VENC>;
+ clocks = <&vencsys CLK_VENC_VENC>;
+ clock-names = "venc";
+ };
+
ipu_conn: syscon@19000000 {
compatible = "mediatek,mt8183-ipu_conn", "syscon";
reg = <0 0x19000000 0 0x1000>;
--
2.43.0

36 changes: 36 additions & 0 deletions mt8183/04-arm64-dts-mediatek-mt8183-Drop-VDEC_SYS-register.patch
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From ddd99db269e9f0f1105363dd6f2eb2e9d487c0e2 Mon Sep 17 00:00:00 2001
From: Alicja Michalska <[email protected]>
Date: Mon, 27 Nov 2023 18:06:29 +0100
Subject: [PATCH] arm64: dts: mediatek: mt8183: Drop VDEC_SYS register

Seems like it's not needed anymore with new register organization.
Attempt to load the module with it present causes probe to fail:

[17.904193] mtk-vcodec-dec 16000000.vcodec: Adding to iommu group 0
[17.904272] mtk-vcodec-dec 16000000.vcodec: Invalid register property
size: 12
[17.904278] mtk-vcodec-dec 16000000.vcodec: Failed to init dec resources
[17.904306] mtk-vcodec-dec: probe of 16000000.vcodec failed with error
-22

Signed-off-by: Alicja Michalska <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index 07ca7448adfd..bfcceb34bc40 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -2150,7 +2150,7 @@ vdecsys: syscon@16000000 {

vcodec_dec: vcodec@16000000 {
compatible = "mediatek,mt8183-vcodec-dec";
- reg = <0 0x16000000 0 0x1000>, /* VDEC_SYS */
+ reg = /* <0 0x16000000 0 0x1000>, VDEC_SYS - deprecated? */
<0 0x16020000 0 0x1000>, /* VDEC_MISC */
<0 0x16021000 0 0x800>, /* VDEC_VLD */
<0 0x16021800 0 0x800>, /* VDEC_TOP */
--
2.43.0

46 changes: 46 additions & 0 deletions mt8183/05-arm64-dts-mediatek-mt8183-Add-register-names-and-sys.patch
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From 7ce7e9354cd7509fd1264d4a7ad6762023ff352e Mon Sep 17 00:00:00 2001
From: Alicja Michalska <[email protected]>
Date: Sun, 26 Nov 2023 23:32:20 +0100
Subject: [PATCH] arm64: dts: mediatek: mt8183: Add register names and syscon
pointer

Based on patch from Collabora, it seems like we missed it.
Another node exists for vencsys, so adding that as well.

Signed-off-by: Alicja Michalska <[email protected]>
---
arch/arm64/boot/dts/mediatek/mt8183.dtsi | 4 ++++
1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
index d4506fe54a8b..07ca7448adfd 100644
--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi
@@ -2162,6 +2162,8 @@ vcodec_dec: vcodec@16000000 {
<0 0x16027000 0 0x800>, /* VP6_VD */
<0 0x16027800 0 0x800>, /* VP8_VL */
<0 0x16028400 0 0x400>; /* VP9_VD */
+ reg-names = "misc", "ld", "top", "cm", "ad", "av", "pp",
+ "hwd", "hwq", "hwb", "hwg";
interrupts = <GIC_SPI 250 IRQ_TYPE_LEVEL_LOW>;
mediatek,larb = <&larb1>;
iommus = <&iommu M4U_PORT_HW_VDEC_MC_EXT>,
@@ -2172,6 +2174,7 @@ vcodec_dec: vcodec@16000000 {
<&iommu M4U_PORT_HW_VDEC_PRED_WR_EXT>,
<&iommu M4U_PORT_HW_VDEC_PPWRAP_EXT>;
mediatek,scp = <&scp>;
+ mediatek,vdecsys = <&vdecsys>;
power-domains = <&spm MT8183_POWER_DOMAIN_VDEC>;
clocks = <&vdecsys CLK_VDEC_VDEC>;
clock-names = "vdec";
@@ -2227,6 +2230,7 @@ vcodec_enc: vcodec@17020000 {
<&iommu M4U_PORT_VENC_REF_LUMA>,
<&iommu M4U_PORT_VENC_REF_CHROMA>;
mediatek,scp = <&scp>;
+ mediatek,vencsys = <&vencsys>;
power-domains = <&spm MT8183_POWER_DOMAIN_VENC>;
clocks = <&vencsys CLK_VENC_VENC>;
clock-names = "venc";
--
2.43.0

94 changes: 94 additions & 0 deletions mt8183/06-arm64-dts-mt8183-Add-jacuzzi-makomo-board.patch
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@@ -0,0 +1,94 @@
From 4f5d946ce43de73baed71589c057b9550e56bada Mon Sep 17 00:00:00 2001
From: Hsin-Yi Wang <[email protected]>
Date: Thu, 26 Oct 2023 12:09:14 -0700
Subject: [PATCH] arm64: dts: mt8183: Add jacuzzi makomo board

makomo is also known as Lenovo 100e Chromebook 2nd Gen MTK 2.

Signed-off-by: Hsin-Yi Wang <[email protected]>
Reviewed-by: AngeloGioacchino Del Regno <[email protected]>
Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
---
arch/arm64/boot/dts/mediatek/Makefile | 2 ++
.../mt8183-kukui-jacuzzi-makomo-sku0.dts | 24 +++++++++++++++++++
.../mt8183-kukui-jacuzzi-makomo-sku1.dts | 24 +++++++++++++++++++
3 files changed, 50 insertions(+)
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku0.dts
create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku1.dts

diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile
index a13419e67e8e..1b85a8c12850 100644
--- a/arch/arm64/boot/dts/mediatek/Makefile
+++ b/arch/arm64/boot/dts/mediatek/Makefile
@@ -32,6 +32,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-fennel14-sku2.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-juniper-sku16.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-kappa.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-kenzo.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-makomo-sku0.dtb
+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-makomo-sku1.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-willow-sku0.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-willow-sku1.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kakadu.dtb
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku0.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku0.dts
new file mode 100644
index 000000000000..4eb2a0d571af
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku0.dts
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2023 Google LLC
+ */
+
+/dts-v1/;
+#include "mt8183-kukui-jacuzzi-fennel.dtsi"
+#include "mt8183-kukui-audio-da7219-rt1015p.dtsi"
+
+/ {
+ model = "Google makomo sku0 board";
+ chassis-type = "laptop";
+ compatible = "google,makomo-sku0", "google,makomo", "mediatek,mt8183";
+};
+
+&qca_wifi {
+ qcom,ath10k-calibration-variant = "GO_FENNEL14";
+};
+
+&mmc1_pins_uhs {
+ pins-clk {
+ drive-strength = <MTK_DRIVE_6mA>;
+ };
+};
diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku1.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku1.dts
new file mode 100644
index 000000000000..6a733361e8ae
--- /dev/null
+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku1.dts
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: (GPL-2.0 OR MIT)
+/*
+ * Copyright 2023 Google LLC
+ */
+
+/dts-v1/;
+#include "mt8183-kukui-jacuzzi-fennel.dtsi"
+#include "mt8183-kukui-audio-ts3a227e-rt1015p.dtsi"
+
+/ {
+ model = "Google makomo sku1 board";
+ chassis-type = "laptop";
+ compatible = "google,makomo-sku1", "google,makomo", "mediatek,mt8183";
+};
+
+&qca_wifi {
+ qcom,ath10k-calibration-variant = "GO_FENNEL14";
+};
+
+&mmc1_pins_uhs {
+ pins-clk {
+ drive-strength = <MTK_DRIVE_6mA>;
+ };
+};
--
2.43.0

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