fix: Please pylint

DSD-DBS · Nov 19, 2024 · 41997fe · 41997fe
1 parent 97e75f1
commit 41997fe
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Showing 2 changed files with 27 additions and 26 deletions.
diff --git a/capellambse_context_diagrams/collectors/default.py b/capellambse_context_diagrams/collectors/default.py
@@ -90,13 +90,12 @@ def process_context(self):
 
         self.data.children.extend(self.global_boxes.values())
         if self.diagram._display_parent_relation:
-            owner_boxes: dict[str, _elkjs.ELKInputChild] = {
-                uuid: box for uuid, box in self.made_boxes.items()
-            }
             generic.move_parent_boxes_to_owner(
-                owner_boxes, self.diagram.target, self.data
+                self.made_boxes, self.diagram.target, self.data
+            )
+            generic.move_edges(
+                self.made_boxes, self.exchanges.values(), self.data
             )
-            generic.move_edges(owner_boxes, self.exchanges.values(), self.data)
 
         if self.diagram._hide_direct_children:
             self.centerbox.children = []

diff --git a/capellambse_context_diagrams/context.py b/capellambse_context_diagrams/context.py
@@ -515,39 +515,41 @@ def _yield_port_allocations(
             )
             styleclass = self.serializer.get_styleclass(port.id)
             if styleclass in {"FIP", "FOP"}:
-                yield self._create_edge(
+                yield _create_edge(
                     styleclass,
                     port.id,
                     interface_port.id,
                     port_middle,
                     interface_middle,
                 )
 
-    def _create_edge(
-        self, styleclass, port_id, interface_id, port_middle, interface_middle
-    ) -> _elkjs.ELKOutputEdge:
-        if styleclass == "FIP":
-            eid = f"__PortInputAllocation:{port_id}"
-            src_id, trg_id = port_id, interface_id
-            routing_points = [port_middle, interface_middle]
-        elif styleclass == "FOP":
-            eid = f"__PortOutputAllocation:{port_id}"
-            src_id, trg_id = interface_id, port_id
-            routing_points = [interface_middle, port_middle]
-
-        return _elkjs.ELKOutputEdge(
-            id=eid,
-            type="edge",
-            routingPoints=routing_points,
-            sourceId=src_id,
-            targetId=trg_id,
-        )
-
     @property
     def name(self) -> str:  # type: ignore
         return f"Interface Context of {self.target.name}"
 
 
+def _create_edge(
+    styleclass, port_id, interface_id, port_middle, interface_middle
+) -> _elkjs.ELKOutputEdge:
+    if styleclass == "FIP":
+        eid = f"__PortInputAllocation:{port_id}"
+        src_id, trg_id = port_id, interface_id
+        routing_points = [port_middle, interface_middle]
+    else:
+        # styleclass == "FOP"
+        eid = f"__PortOutputAllocation:{port_id}"
+        src_id, trg_id = interface_id, port_id
+        routing_points = [interface_middle, port_middle]
+
+    return _elkjs.ELKOutputEdge(
+        id=eid,
+        type="edge",
+        routingPoints=routing_points,
+        sourceId=src_id,
+        targetId=trg_id,
+    )
+
+
 class FunctionalContextDiagram(ContextDiagram):
     """An automatically generated Context Diagram exclusively for
     Components.