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adds armv8 (aarch64) lifter #1291

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merged 23 commits into from
Apr 4, 2021
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f8ced7b
adds a minimal (incomplete) AARCH64 lifter
ivg Mar 19, 2021
62de01d
makes KB name to string conversion more robust
ivg Mar 23, 2021
655657c
adds --show-addr and --show-memory options to bap mc and objdump
ivg Mar 23, 2021
40b686c
adds a few more semantic primitives and tweaks the existing
ivg Mar 23, 2021
2bfa733
lifts even more aarch64 instructions
ivg Mar 23, 2021
480fbce
updates armv8's register file
ivg Mar 25, 2021
984246c
uses Theory.Target.reg to correctly map names to registers
ivg Mar 25, 2021
ccfd5ff
adds more primitives
ivg Mar 25, 2021
81e07ab
disables handling of pseudo-registers
ivg Mar 25, 2021
a4617b1
implements more instructions
ivg Mar 25, 2021
8371084
fixes function argument passing
ivg Mar 26, 2021
bb44b85
implements variable/place tracking adds a symbol primitive
ivg Mar 26, 2021
238cf11
adds a Theory.Target.has_roles function
ivg Mar 26, 2021
dd35c2e
implements constant and zero registers handling on the theory level
ivg Mar 26, 2021
44d17b9
adds the MIPS ZERO register to the target description
ivg Mar 26, 2021
e38be27
adds more aarch64 instructions
ivg Mar 26, 2021
ce37223
drops any handling of the pseudoregisters from the lisp compiler
ivg Mar 26, 2021
b60873a
adds more aarch64 instructions
ivg Mar 26, 2021
197edc4
finishes all the necessary aarch64 instructions
ivg Mar 29, 2021
8a66143
enables ABI and fixes a few instructions
ivg Mar 29, 2021
d847c47
more bugfixes - the lifter is now minimally complete
ivg Mar 29, 2021
ba2843c
implements armv8 (aapcs64) ABI
ivg Apr 2, 2021
4d91492
updates the testsuite
ivg Apr 2, 2021
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2 changes: 1 addition & 1 deletion Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -55,7 +55,7 @@ testsuite:
git clone https://github.com/BinaryAnalysisPlatform/bap-testsuite.git testsuite

check: testsuite
make REVISION=eaa6b5e -C testsuite
make REVISION=3720beda -C testsuite

.PHONY: indent check-style status-clean

Expand Down
26 changes: 17 additions & 9 deletions lib/arm/arm_target.ml
Original file line number Diff line number Diff line change
Expand Up @@ -76,10 +76,13 @@ let vfp3regs = Theory.Role.Register.[

let vars32_fp = vars32 @ untyped @@ array r64 "D" 16

let gp64 = array r64 "X" 30
let gp64 = array r64 "X" 29
let fp64 = array r128 "Q" 32
let sp64 = [reg r64 "SP"]
let lr64 = [reg r64 "LR"]
let fp64 = reg r64 "FP" (* X29 *)
let lr64 = reg r64 "LR" (* X30 *)
let sp64 = reg r64 "SP" (* X31 *)
let zr64 = reg r64 "XZR"
let zr32 = reg r32 "WZR"
let mems64 = CT.Mem.define r64 r8
let data64 = CT.Var.define mems64 "mem"
let flags64 = [
Expand All @@ -89,13 +92,18 @@ let flags64 = [
reg bool "VF";
]

let vars64 = gp64 @< fp64 @< sp64 @< lr64 @< flags64 @< [data64]
let vars64 = gp64 @< [fp64; sp64; lr64] @< flags64 @< [data64]

let regs64 = Theory.Role.Register.[
[general; integer], gp64 @< sp64 @< lr64;
[general; floating], untyped fp64;
[stack_pointer], untyped sp64;
[link], untyped lr64;
[general; integer], gp64 @< [fp64; lr64; sp64];
[general; floating], untyped [fp64];
[stack_pointer], untyped [sp64];
[frame_pointer], untyped [fp64];
[function_argument], array r64 "X" 8 @< array r64 "Q" 8;
[function_return], [reg r64 "X0"] @< [reg r128 "Q0"];
[constant; zero; pseudo], [zr64] @< [zr32];
[pseudo], array r32 "W" 31 @< [reg r32 "WSP"];
[link], untyped [lr64];
] @ status_regs


Expand Down Expand Up @@ -375,7 +383,7 @@ let enable_arch () =

let llvm_a32 = CT.Language.declare ~package "llvm-A32"
let llvm_t32 = CT.Language.declare ~package "llvm-T32"
let llvm_a64 = CT.Language.declare ~package "llvm-A64"
let llvm_a64 = CT.Language.declare ~package "llvm-aarch64"

module Dis = Disasm_expert.Basic

Expand Down
26 changes: 11 additions & 15 deletions lib/bap/bap_project.ml
Original file line number Diff line number Diff line change
Expand Up @@ -44,21 +44,17 @@ let with_filename spec target code memory path =
let width = Theory.Target.code_addr_size target in
let bias = query spec Image.Scheme.bias |> Option.map
~f:(fun x -> Bitvec.(int64 x mod modulus width)) in
KB.promising Theory.Label.unit ~promise:(fun label ->
KB.collect Theory.Label.addr label >>=? fun addr ->
let addr = Word.create addr width in
if Memmap.contains code addr then
Theory.Unit.for_file path >>= fun unit ->
KB.sequence [
KB.provide Image.Spec.slot unit spec;
KB.provide Theory.Unit.bias unit bias;
KB.provide Theory.Unit.target unit target;
KB.provide Image.Spec.slot unit spec;
KB.provide Theory.Unit.path unit (Some path);
KB.provide memory_slot unit memory;
] >>| fun () ->
Some unit
else KB.return None)
KB.promising Theory.Label.unit ~promise:(fun _ ->
Theory.Unit.for_file path >>= fun unit ->
KB.sequence [
KB.provide Image.Spec.slot unit spec;
KB.provide Theory.Unit.bias unit bias;
KB.provide Theory.Unit.target unit target;
KB.provide Image.Spec.slot unit spec;
KB.provide Theory.Unit.path unit (Some path);
KB.provide memory_slot unit memory;
] >>| fun () ->
Some unit)


module State = struct
Expand Down
8 changes: 7 additions & 1 deletion lib/bap_c/bap_c_abi.ml
Original file line number Diff line number Diff line change
Expand Up @@ -311,6 +311,8 @@ module Arg = struct

let bits self = self.bits

let deplet self = {self with args = Map.empty (module Int)}

let pop self = match Map.min_elt self.args with
| None -> None
| Some (k,x) ->
Expand Down Expand Up @@ -434,7 +436,7 @@ module Arg = struct
Arg.return res
let pop s n = update s n File.pop
let popn ~n s a = update s a (File.popn n)

let deplet s n = update s n @@ fun s -> Some (File.deplet s,())
end

let size s t = match s.ruler#bits t with
Expand Down Expand Up @@ -492,6 +494,10 @@ module Arg = struct
let* s = Arg.get () in
Arena.popn ~n:2 s file >>| ignore

let deplet file =
let* s = Arg.get () in
Arena.deplet s file

let switch where = Arg.update @@ fun s -> {s with where}
let where = Arg.gets @@ fun s -> s.where

Expand Down
6 changes: 6 additions & 0 deletions lib/bap_c/bap_c_abi.mli
Original file line number Diff line number Diff line change
Expand Up @@ -286,6 +286,12 @@ module Arg : sig
*)
val align_even : arena -> unit t

(** [deplet arena] unconditionally consumes all registers in arena.

The computation is never rejected.
*)
val deplet : arena -> unit t

(** [reference arena t] passes the argument of type [t] as a pointer
to [t] via the first available register in [arena].

Expand Down
6 changes: 6 additions & 0 deletions lib/bap_core_theory/bap_core_theory.mli
Original file line number Diff line number Diff line change
Expand Up @@ -1574,6 +1574,12 @@ module Theory : sig
*)
val var : t -> string -> unit Var.t option


(** [has_roles t roles v] is true if [v] has all the [roles] in [t].

@since 2.3.0 *)
val has_roles : t -> role list -> 'a Var.t -> bool

(** [endianness target] describes the byte order.

Describes how multibyte words are stored in the main memory. *)
Expand Down
4 changes: 4 additions & 0 deletions lib/bap_core_theory/bap_core_theory_target.ml
Original file line number Diff line number Diff line change
Expand Up @@ -252,6 +252,10 @@ let is_included roles info = match roles with
| Some included ->
fun var -> List.for_all included ~f:(has_role info.regs var)

let has_roles t roles var =
let {regs} = info t and var = Var.forget var in
List.for_all roles ~f:(has_role regs var)

let regs ?exclude ?roles t =
let info = info t in
let pred = match exclude,roles with
Expand Down
1 change: 1 addition & 0 deletions lib/bap_core_theory/bap_core_theory_target.mli
Original file line number Diff line number Diff line change
Expand Up @@ -64,6 +64,7 @@ val regs :
?roles:role list ->
t -> Set.M(Var.Top).t
val reg : ?exclude:role list -> ?unique:bool -> t -> role -> unit Var.t option
val has_roles : t -> role list -> _ Var.t -> bool
val endianness : t -> endianness
val system : t -> system
val abi : t -> abi
Expand Down
1 change: 1 addition & 0 deletions lib/bap_mips/bap_mips_target.ml
Original file line number Diff line number Diff line change
Expand Up @@ -64,6 +64,7 @@ let define ?(parent=parent) bits endianness =
~regs:Theory.Role.Register.[
[general; integer], regs gpr_names;
[general; floating], untyped fprs;
[constant; zero; pseudo], regs ["ZERO"];
[stack_pointer], regs ["SP"];
[frame_pointer], regs ["FP"];
[link], regs ["RA"];
Expand Down
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