regs: add convenience getter methods for a registers

AluVM · Oct 18, 2024 · b9a2312 · b9a2312
1 parent 7adf61d
commit b9a2312
Showing 1 changed file with 11 additions and 0 deletions.
diff --git a/src/reg/core_regs.rs b/src/reg/core_regs.rs
@@ -211,6 +211,17 @@ impl CoreRegs {
         }
     }
 
+    /// Get value from `a8` register.
+    pub fn a8(&self, idx: impl Into<Reg32>) -> Option<u8> { self.a8[idx.into().to_usize()] }
+    /// Get value from `a16` register.
+    pub fn a16(&self, idx: impl Into<Reg32>) -> Option<u16> { self.a16[idx.into().to_usize()] }
+    /// Get value from `a32` register.
+    pub fn a32(&self, idx: impl Into<Reg32>) -> Option<u32> { self.a32[idx.into().to_usize()] }
+    /// Get value from `a64` register.
+    pub fn a64(&self, idx: impl Into<Reg32>) -> Option<u64> { self.a64[idx.into().to_usize()] }
+    /// Get value from `a128` register.
+    pub fn a128(&self, idx: impl Into<Reg32>) -> Option<u128> { self.a128[idx.into().to_usize()] }
+
     /// Extracts value for any type of registers
     pub fn get(&self, reg: impl Into<Reg>) -> RegValue {
         match reg.into() {