Incorrect Interrupt Numbers for UART4, UART5, and UART6 in STM32G0 Device Tree Files #81704
Labels
area: Devicetree
area: UART
Universal Asynchronous Receiver-Transmitter
bug
The issue is a bug, or the PR is fixing a bug
platform: STM32
ST Micro STM32
priority: low
Low impact/importance bug
Description: There is an issue in the Zephyr Device Tree configuration for STM32G0 series UART peripherals. Specifically, the interrupt numbers for UART4, UART5, and UART6 are assigned the same interrupt number (IRQ 29). This results in conflicts when using these UARTs simultaneously.
Current Issue:
USART4 in STM32G071 is incorrectly assigned IRQ 29 in STM32g071.dtsi.
USART5 and USART6 in STM32G0B1 are also assigned IRQ 29 in STM32g0b1.dtsi.
This overlap leads to issues when multiple UART peripherals are used together, causing the system to not differentiate between interrupts properly, and potentially leading to incorrect interrupt handling or system crashes.
Correct Interrupt Numbers: According to the STM32G0 reference manual, the correct interrupt numbers should be:
USART4: IRQ 30
USART5: IRQ 31
USART6: IRQ 32
Proposed Fix:
Update the interrupts values for USART4, USART5, and USART6 in the respective .dtsi files to reflect the correct IRQ assignments:
In STM32g071.dtsi, update USART4 to IRQ 30.
In STM32g0b1.dtsi, update USART5 to IRQ 31, and USART6 to IRQ 32.
Example of the Corrected DTS Configuration:
usart4: serial@40004c00 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40004c00 0x400>;
clocks = <&rcc STM32_CLOCK(APB1, 19U)>;
resets = <&rctl STM32_RESET(APB1L, 19U)>;
interrupts = <30 0>; /* Correct IRQ for USART4 */
status = "disabled";
};
usart5: serial@40005000 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40005000 0x400>;
clocks = <&rcc STM32_CLOCK(APB1, 8U)>;
resets = <&rctl STM32_RESET(APB1L, 8U)>;
interrupts = <31 0>; /* Correct IRQ for USART5 */
status = "disabled";
};
usart6: serial@40013c00 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40013c00 0x400>;
clocks = <&rcc STM32_CLOCK(APB1, 9U)>;
resets = <&rctl STM32_RESET(APB1L, 9U)>;
interrupts = <32 0>; /* Correct IRQ for USART6 */
status = "disabled";
};
Conclusion: This update will prevent interrupt conflicts when using UART4, UART5, and UART6 together, ensuring that each peripheral has its own unique interrupt handler.
Steps to Reproduce:
Use STM32G0B1 and STM32G071 with UART4, UART5, and UART6 enabled.
Observe interrupt conflicts and failures due to the same interrupt number (29) being used for all three UARTs.
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