From e761e8431b9ed71da50ab273ced5393012c2f075 Mon Sep 17 00:00:00 2001 From: Erwan Gouriou Date: Tue, 10 Oct 2023 15:41:36 +0200 Subject: [PATCH] doc: migration guide 3.5: Document STM32 changes Document STM32 breaking or not backward compatible changes made on V3.5 release. Signed-off-by: Erwan Gouriou --- doc/releases/migration-guide-3.5.rst | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/doc/releases/migration-guide-3.5.rst b/doc/releases/migration-guide-3.5.rst index d311ad4191728fd..778db2d52bb58e5 100644 --- a/doc/releases/migration-guide-3.5.rst +++ b/doc/releases/migration-guide-3.5.rst @@ -235,6 +235,23 @@ Required changes This means that an extra linker stage is no longer necessary if this option is not enabled. +* STM32 Ethernet driver was misusing :c:func:`hwinfo_get_device_id` to generate + last 3 bytes of mac address, resulting in a high risk of collision when using + SoCs from the same lot. This is now fixed to use the whole range of entropy + available from the unique ID (96 bits). Devices using unique ID based mac address + will see last 3 bytes of their MAC address modified by this change. + +* On all STM32 (except F1x and F37x series), two new required properties have been + added to ADC to configure the source clock and the prescaler. + ``st,adc-clock-source`` allows choosing either synchronous or asynchronous clock source. + ``st,adc-prescaler`` allows setting the value of the prescaler for the chosen clock source. + Not all combinations are allowed. Refer to the appropriate RefMan for more information. + When choosing asynchronous clock, the choice of the kernel source clock is made in the + ``clocks`` node as it is done for other peripherals, for example, to select + HSI16 as clock source for STM32G0: + clocks = <&rcc STM32_CLOCK_BUS_APB1_2 0x00100000>, + <&rcc STM32_SRC_HSI ADC_SEL(2)>; + Recommended Changes *******************