diff --git a/arch/arm/core/cortex_a_r/irq_init.c b/arch/arm/core/cortex_a_r/irq_init.c
index 88654b906142d56..57ab79eaed32f4c 100644
--- a/arch/arm/core/cortex_a_r/irq_init.c
+++ b/arch/arm/core/cortex_a_r/irq_init.c
@@ -24,6 +24,6 @@ void z_arm_interrupt_init(void)
 	 */
 #ifdef CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER
 	/* Invoke SoC-specific interrupt controller initialisation */
-	z_soc_irq_init();
+	platform_irq_init();
 #endif
 }
diff --git a/arch/arm/core/cortex_a_r/irq_manage.c b/arch/arm/core/cortex_a_r/irq_manage.c
index a381fad2a48712d..e56e049160ebcfb 100644
--- a/arch/arm/core/cortex_a_r/irq_manage.c
+++ b/arch/arm/core/cortex_a_r/irq_manage.c
@@ -65,7 +65,7 @@ int arch_irq_is_enabled(unsigned int irq)
  * priority levels which are reserved: three for various types of exceptions,
  * and possibly one additional to support zero latency interrupts.
  */
-void z_arm_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags)
+void arch_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags)
 {
 	arm_gic_irq_set_priority(irq, prio, flags);
 }
@@ -112,7 +112,7 @@ int arch_irq_connect_dynamic(unsigned int irq, unsigned int priority,
 			     const void *parameter, uint32_t flags)
 {
 	z_isr_install(irq, routine, parameter);
-	z_arm_irq_priority_set(irq, priority, flags);
+	arch_irq_priority_set(irq, priority, flags);
 	return irq;
 }
 #endif /* CONFIG_GEN_ISR_TABLES */
diff --git a/arch/arm/core/cortex_a_r/isr_wrapper.S b/arch/arm/core/cortex_a_r/isr_wrapper.S
index 0cd30e0a34313c3..b12f686b72e52f7 100644
--- a/arch/arm/core/cortex_a_r/isr_wrapper.S
+++ b/arch/arm/core/cortex_a_r/isr_wrapper.S
@@ -179,7 +179,7 @@ _idle_state_cleared:
 #if !defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
 	bl arm_gic_get_active
 #else
-	bl z_soc_irq_get_active
+	bl platform_irq_get_active
 #endif /* !CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
 	push {r0, r1}
 	lsl r0, r0, #3	/* table is 8-byte wide */
@@ -217,7 +217,7 @@ spurious_continue:
 #if !defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
 	bl arm_gic_eoi
 #else
-	bl z_soc_irq_eoi
+	bl platform_irq_eoi
 #endif /* !CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
 
 #ifdef CONFIG_TRACING_ISR
@@ -291,7 +291,7 @@ _idle_state_cleared:
 #if !defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
 	bl arm_gic_get_active
 #else
-	bl z_soc_irq_get_active
+	bl platform_irq_get_active
 #endif /* !CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
 
 	push {r0, r1}
@@ -323,7 +323,7 @@ spurious_continue:
 #if !defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
 	bl arm_gic_eoi
 #else
-	bl z_soc_irq_eoi
+	bl platform_irq_eoi
 #endif /* !CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
 
 #ifdef CONFIG_TRACING_ISR
diff --git a/arch/arm/core/cortex_m/irq_manage.c b/arch/arm/core/cortex_m/irq_manage.c
index 3940d5246d4b5d2..d5edac302335fad 100644
--- a/arch/arm/core/cortex_m/irq_manage.c
+++ b/arch/arm/core/cortex_m/irq_manage.c
@@ -58,7 +58,7 @@ int arch_irq_is_enabled(unsigned int irq)
  * of priority levels is a little complex, as there are some hardware
  * priority levels which are reserved.
  */
-void z_arm_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags)
+void arch_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags)
 {
 	/* The kernel may reserve some of the highest priority levels.
 	 * So we offset the requested priority level with the number
@@ -245,7 +245,7 @@ int arch_irq_connect_dynamic(unsigned int irq, unsigned int priority,
 			     const void *parameter, uint32_t flags)
 {
 	z_isr_install(irq, routine, parameter);
-	z_arm_irq_priority_set(irq, priority, flags);
+	arch_irq_priority_set(irq, priority, flags);
 	return irq;
 }
 #endif /* CONFIG_GEN_ISR_TABLES */
diff --git a/arch/arm/core/cortex_m/isr_wrapper.S b/arch/arm/core/cortex_m/isr_wrapper.S
index f81b577804f53ba..f5b68d1e4e44e50 100644
--- a/arch/arm/core/cortex_m/isr_wrapper.S
+++ b/arch/arm/core/cortex_m/isr_wrapper.S
@@ -98,7 +98,7 @@ _idle_state_cleared:
 #endif /* CONFIG_PM */
 
 #if defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
-	bl z_soc_irq_get_active
+	bl platform_irq_get_active
 #else
 	mrs r0, IPSR	/* get exception number */
 #endif /* CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
@@ -129,7 +129,7 @@ _idle_state_cleared:
 
 #if defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
 	pop {r0}
-	bl z_soc_irq_eoi
+	bl platform_irq_eoi
 #endif /* CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
 
 #ifdef CONFIG_TRACING_ISR
diff --git a/arch/arm/core/cortex_m/prep_c.c b/arch/arm/core/cortex_m/prep_c.c
index 329f7f8987ddbf9..0b50bac4a973dda 100644
--- a/arch/arm/core/cortex_m/prep_c.c
+++ b/arch/arm/core/cortex_m/prep_c.c
@@ -189,7 +189,7 @@ void z_arm_prep_c(void)
 	z_data_copy();
 #if defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
 	/* Invoke SoC-specific interrupt controller initialization */
-	z_soc_irq_init();
+	platform_irq_init();
 #else
 	z_arm_interrupt_init();
 #endif /* CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
diff --git a/arch/arm64/core/irq_init.c b/arch/arm64/core/irq_init.c
index de8f46bdec100d7..ac3e69d3be4b7fc 100644
--- a/arch/arm64/core/irq_init.c
+++ b/arch/arm64/core/irq_init.c
@@ -26,6 +26,6 @@ void z_arm64_interrupt_init(void)
 {
 #ifdef CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER
 	/* Invoke SoC-specific interrupt controller initialisation */
-	z_soc_irq_init();
+	platform_irq_init();
 #endif
 }
diff --git a/arch/arm64/core/isr_wrapper.S b/arch/arm64/core/isr_wrapper.S
index 809762f27f96b08..e7b1c00e13e7a6f 100644
--- a/arch/arm64/core/isr_wrapper.S
+++ b/arch/arm64/core/isr_wrapper.S
@@ -61,7 +61,7 @@ SECTION_FUNC(TEXT, _isr_wrapper)
 #if !defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
 	bl	arm_gic_get_active
 #else
-	bl	z_soc_irq_get_active
+	bl	platform_irq_get_active
 #endif /* !CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
 
 #if CONFIG_GIC_VER >= 3
@@ -104,7 +104,7 @@ spurious_continue:
 #if !defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
 	bl	arm_gic_eoi
 #else
-	bl	z_soc_irq_eoi
+	bl	platform_irq_eoi
 #endif /* !CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
 
 #ifdef CONFIG_TRACING
diff --git a/drivers/interrupt_controller/intc_ra_icu.c b/drivers/interrupt_controller/intc_ra_icu.c
index 167673f187fd6ef..cb7fd7ca004596c 100644
--- a/drivers/interrupt_controller/intc_ra_icu.c
+++ b/drivers/interrupt_controller/intc_ra_icu.c
@@ -97,7 +97,7 @@ int ra_icu_irq_connect_dynamic(unsigned int irq, unsigned int priority,
 	irq_disable(irqn);
 	sys_write32(event, IELSRn_REG(irqn));
 	z_isr_install(irqn, routine, parameter);
-	z_arm_irq_priority_set(irqn, priority, flags);
+	arch_irq_priority_set(irqn, priority, flags);
 	ra_icu_irq_configure(event, intcfg);
 	irq_enable(irqn);
 
diff --git a/include/zephyr/arch/arm/irq.h b/include/zephyr/arch/arm/irq.h
index 998635ddef6e555..0b29dc3d73ae4d6 100644
--- a/include/zephyr/arch/arm/irq.h
+++ b/include/zephyr/arch/arm/irq.h
@@ -29,8 +29,8 @@ GTEXT(arch_irq_enable)
 GTEXT(arch_irq_disable)
 GTEXT(arch_irq_is_enabled)
 #if defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
-GTEXT(z_soc_irq_get_active)
-GTEXT(z_soc_irq_eoi)
+GTEXT(platform_irq_get_active)
+GTEXT(platform_irq_eoi)
 #endif /* CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
 #else
 
@@ -41,7 +41,7 @@ extern void arch_irq_disable(unsigned int irq);
 extern int arch_irq_is_enabled(unsigned int irq);
 
 /* internal routine documented in C file, needed by IRQ_CONNECT() macro */
-extern void z_arm_irq_priority_set(unsigned int irq, unsigned int prio,
+extern void arch_irq_priority_set(unsigned int irq, unsigned int prio,
 				   uint32_t flags);
 
 #else
@@ -51,23 +51,22 @@ extern void z_arm_irq_priority_set(unsigned int irq, unsigned int prio,
  * interrupt control functions to the SoC layer interrupt control functions.
  */
 
-void z_soc_irq_init(void);
+void platform_irq_init(void);
 void platform_irq_enable(unsigned int irq);
 void platform_irq_disable(unsigned int irq);
 int platform_irq_is_enabled(unsigned int irq);
 
-void z_soc_irq_priority_set(
-	unsigned int irq, unsigned int prio, unsigned int flags);
+void platform_irq_priority_set(unsigned int irq, unsigned int prio, unsigned int flags);
 
-unsigned int z_soc_irq_get_active(void);
-void z_soc_irq_eoi(unsigned int irq);
+unsigned int platform_irq_get_active(void);
+void platform_irq_eoi(unsigned int irq);
 
 #define arch_irq_enable(irq)		platform_irq_enable(irq)
 #define arch_irq_disable(irq)		platform_irq_disable(irq)
 #define arch_irq_is_enabled(irq)	platform_irq_is_enabled(irq)
 
-#define z_arm_irq_priority_set(irq, prio, flags)	\
-	z_soc_irq_priority_set(irq, prio, flags)
+#define arch_irq_priority_set(irq, prio, flags)	\
+	platform_irq_priority_set(irq, prio, flags)
 
 #endif /* !CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
 
@@ -119,7 +118,7 @@ extern void z_arm_interrupt_init(void);
 			"ZLI interrupt registered but feature is disabled"); \
 	_CHECK_PRIO(priority_p, flags_p) \
 	Z_ISR_DECLARE(irq_p, 0, isr_p, isr_param_p); \
-	z_arm_irq_priority_set(irq_p, priority_p, flags_p); \
+	arch_irq_priority_set(irq_p, priority_p, flags_p); \
 }
 
 #define ARCH_IRQ_DIRECT_CONNECT(irq_p, priority_p, isr_p, flags_p) \
@@ -128,7 +127,7 @@ extern void z_arm_interrupt_init(void);
 			"ZLI interrupt registered but feature is disabled"); \
 	_CHECK_PRIO(priority_p, flags_p) \
 	Z_ISR_DECLARE(irq_p, ISR_FLAG_DIRECT, isr_p, NULL); \
-	z_arm_irq_priority_set(irq_p, priority_p, flags_p); \
+	arch_irq_priority_set(irq_p, priority_p, flags_p); \
 }
 
 #ifdef CONFIG_PM
diff --git a/include/zephyr/arch/arm64/irq.h b/include/zephyr/arch/arm64/irq.h
index b205283e72e8d15..2143c1e7070d027 100644
--- a/include/zephyr/arch/arm64/irq.h
+++ b/include/zephyr/arch/arm64/irq.h
@@ -28,8 +28,8 @@ GTEXT(arch_irq_enable)
 GTEXT(arch_irq_disable)
 GTEXT(arch_irq_is_enabled)
 #if defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
-GTEXT(z_soc_irq_get_active)
-GTEXT(z_soc_irq_eoi)
+GTEXT(platform_irq_get_active)
+GTEXT(platform_irq_eoi)
 #endif /* CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
 #else
 
@@ -50,23 +50,23 @@ extern void z_arm64_irq_priority_set(unsigned int irq, unsigned int prio,
  * interrupt control functions to the SoC layer interrupt control functions.
  */
 
-void z_soc_irq_init(void);
+void platform_irq_init(void);
 void platform_irq_enable(unsigned int irq);
 void platform_irq_disable(unsigned int irq);
 int platform_irq_is_enabled(unsigned int irq);
 
-void z_soc_irq_priority_set(
+void platform_irq_priority_set(
 	unsigned int irq, unsigned int prio, unsigned int flags);
 
-unsigned int z_soc_irq_get_active(void);
-void z_soc_irq_eoi(unsigned int irq);
+unsigned int platform_irq_get_active(void);
+void platform_irq_eoi(unsigned int irq);
 
 #define arch_irq_enable(irq)		platform_irq_enable(irq)
 #define arch_irq_disable(irq)		platform_irq_disable(irq)
 #define arch_irq_is_enabled(irq)	platform_irq_is_enabled(irq)
 
 #define z_arm64_irq_priority_set(irq, prio, flags)	\
-	z_soc_irq_priority_set(irq, prio, flags)
+	platform_irq_priority_set(irq, prio, flags)
 
 #endif /* !CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
 
diff --git a/soc/arm/infineon_cat1/psoc6/soc.c b/soc/arm/infineon_cat1/psoc6/soc.c
index 74c3703bb03a134..1128c5da421e0e8 100644
--- a/soc/arm/infineon_cat1/psoc6/soc.c
+++ b/soc/arm/infineon_cat1/psoc6/soc.c
@@ -36,7 +36,7 @@ cy_en_sysint_status_t Cy_SysInt_Init(const cy_stc_sysint_t *config, cy_israddres
 		 * PendSV IRQ (which is used in Cortex-M variants to implement thread
 		 * context-switching) is assigned the lowest IRQ priority level.
 		 * If priority is same as PendSV, we will catch assertion in
-		 * z_arm_irq_priority_set function. To avoid this, change priority
+		 * arch_irq_priority_set function. To avoid this, change priority
 		 * to IRQ_PRIO_LOWEST, if it > IRQ_PRIO_LOWEST. Macro IRQ_PRIO_LOWEST
 		 * takes in to account PendSV specific.
 		 */
diff --git a/tests/arch/arm/arm_custom_interrupt/src/arm_custom_interrupt.c b/tests/arch/arm/arm_custom_interrupt/src/arm_custom_interrupt.c
index 97d3c55365d59c1..df985486c1b7252 100644
--- a/tests/arch/arm/arm_custom_interrupt/src/arm_custom_interrupt.c
+++ b/tests/arch/arm/arm_custom_interrupt/src/arm_custom_interrupt.c
@@ -25,7 +25,7 @@ static volatile bool irq_handler_called;
 #define REG_FROM_IRQ(irq) (irq / NUM_IRQS_PER_REG)
 #define BIT_FROM_IRQ(irq) (irq % NUM_IRQS_PER_REG)
 
-void z_soc_irq_init(void)
+void platform_irq_init(void)
 {
 	int irq = 0;
 
@@ -36,7 +36,7 @@ void z_soc_irq_init(void)
 	custom_init_called = true;
 }
 
-void z_soc_irq_enable(unsigned int irq)
+void platform_irq_enable(unsigned int irq)
 {
 	if (irq == sw_irq_number) {
 		custom_enable_called = true;
@@ -44,7 +44,7 @@ void z_soc_irq_enable(unsigned int irq)
 	NVIC_EnableIRQ((IRQn_Type)irq);
 }
 
-void z_soc_irq_disable(unsigned int irq)
+void platform_irq_disable(unsigned int irq)
 {
 	if (irq == sw_irq_number) {
 		custom_disable_called = true;
@@ -52,24 +52,24 @@ void z_soc_irq_disable(unsigned int irq)
 	NVIC_DisableIRQ((IRQn_Type)irq);
 }
 
-int z_soc_irq_is_enabled(unsigned int irq)
+int platform_irq_is_enabled(unsigned int irq)
 {
 	return NVIC->ISER[REG_FROM_IRQ(irq)] & BIT(BIT_FROM_IRQ(irq));
 }
 
-void z_soc_irq_eoi(unsigned int irq)
+void platform_irq_eoi(unsigned int irq)
 {
 	if (irq == sw_irq_number) {
 		custom_eoi_called = true;
 	}
 }
 
-inline __attribute__((always_inline)) unsigned int z_soc_irq_get_active(void)
+inline __attribute__((always_inline)) unsigned int platform_irq_get_active(void)
 {
 	return __get_IPSR();
 }
 
-void z_soc_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags)
+void platform_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags)
 {
 	if (irq == sw_irq_number) {
 		custom_set_priority_called = true;
@@ -105,7 +105,7 @@ void arm_isr_handler(const void *args)
 #endif
 
 	/* IRQ numbers are offset by 16 on Cortex-M. */
-	unsigned int this_irq = z_soc_irq_get_active() - 16;
+	unsigned int this_irq = platform_irq_get_active() - 16;
 
 	TC_PRINT("Got IRQ: %u\n", this_irq);
 
diff --git a/tests/arch/arm/arm_irq_vector_table/src/arm_irq_vector_table.c b/tests/arch/arm/arm_irq_vector_table/src/arm_irq_vector_table.c
index 7d7930661099f0e..754b3a6493236fb 100644
--- a/tests/arch/arm/arm_irq_vector_table/src/arm_irq_vector_table.c
+++ b/tests/arch/arm/arm_irq_vector_table/src/arm_irq_vector_table.c
@@ -134,7 +134,7 @@ void isr2(void)
  * NVIC_SetPendingIRQ(), to trigger the pending interrupt. And we check
  * that the corresponding interrupt handler is getting called or not.
  *
- * @see irq_enable(), z_irq_priority_set(), NVIC_SetPendingIRQ()
+ * @see irq_enable(), arch_irq_priority_set(), NVIC_SetPendingIRQ()
  *
  */
 ZTEST(vector_table, test_arm_irq_vector_table)
@@ -143,7 +143,7 @@ ZTEST(vector_table, test_arm_irq_vector_table)
 
 	for (int ii = 0; ii < 3; ii++) {
 		irq_enable(_ISR_OFFSET + ii);
-		z_arm_irq_priority_set(_ISR_OFFSET + ii, 0, 0);
+		arch_irq_priority_set(_ISR_OFFSET + ii, 0, 0);
 		k_sem_init(&sem[ii], 0, K_SEM_MAX_LIMIT);
 	}