From 738ff49a41589646998749816d992b524a8be48f Mon Sep 17 00:00:00 2001 From: Klaus Nagel Date: Tue, 17 Sep 2024 07:41:47 +0200 Subject: [PATCH] boards: st: nucleo_g431kb: add support for nucleo g431kb Add support for the nucleo g431kb Board. Signed-off-by: Klaus Nagel --- boards/st/nucleo_g431kb/Kconfig.nucleo_g431kb | 5 + boards/st/nucleo_g431kb/board.cmake | 10 + boards/st/nucleo_g431kb/board.yml | 5 + .../nucleo_g431kb/doc/img/nucleo_g431kb.webp | Bin 0 -> 16538 bytes boards/st/nucleo_g431kb/doc/index.rst | 189 ++++++++++++++++++ boards/st/nucleo_g431kb/nucleo_g431kb.dts | 119 +++++++++++ boards/st/nucleo_g431kb/nucleo_g431kb.yaml | 15 ++ .../st/nucleo_g431kb/nucleo_g431kb_defconfig | 21 ++ boards/st/nucleo_g431kb/support/openocd.cfg | 7 + 9 files changed, 371 insertions(+) create mode 100644 boards/st/nucleo_g431kb/Kconfig.nucleo_g431kb create mode 100644 boards/st/nucleo_g431kb/board.cmake create mode 100644 boards/st/nucleo_g431kb/board.yml create mode 100644 boards/st/nucleo_g431kb/doc/img/nucleo_g431kb.webp create mode 100644 boards/st/nucleo_g431kb/doc/index.rst create mode 100644 boards/st/nucleo_g431kb/nucleo_g431kb.dts create mode 100644 boards/st/nucleo_g431kb/nucleo_g431kb.yaml create mode 100644 boards/st/nucleo_g431kb/nucleo_g431kb_defconfig create mode 100644 boards/st/nucleo_g431kb/support/openocd.cfg diff --git a/boards/st/nucleo_g431kb/Kconfig.nucleo_g431kb b/boards/st/nucleo_g431kb/Kconfig.nucleo_g431kb new file mode 100644 index 000000000000000..79f5335fbbdb6ce --- /dev/null +++ b/boards/st/nucleo_g431kb/Kconfig.nucleo_g431kb @@ -0,0 +1,5 @@ +# Copyright (c) 2024 Klaus Nagel +# SPDX-License-Identifier: Apache-2.0 + +config BOARD_NUCLEO_G431KB + select SOC_STM32G431XX diff --git a/boards/st/nucleo_g431kb/board.cmake b/boards/st/nucleo_g431kb/board.cmake new file mode 100644 index 000000000000000..00ab7c45ccfe555 --- /dev/null +++ b/boards/st/nucleo_g431kb/board.cmake @@ -0,0 +1,10 @@ +# SPDX-License-Identifier: Apache-2.0 + +# keep first +board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw") +board_runner_args(pyocd "--target=stm32g431kbtx") + +# keep first +include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake) +include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake) +include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake) diff --git a/boards/st/nucleo_g431kb/board.yml b/boards/st/nucleo_g431kb/board.yml new file mode 100644 index 000000000000000..29194fd833e172d --- /dev/null +++ b/boards/st/nucleo_g431kb/board.yml @@ -0,0 +1,5 @@ +board: + name: nucleo_g431kb + vendor: st + socs: + - name: stm32g431xx diff --git a/boards/st/nucleo_g431kb/doc/img/nucleo_g431kb.webp b/boards/st/nucleo_g431kb/doc/img/nucleo_g431kb.webp new file mode 100644 index 0000000000000000000000000000000000000000..1d7a7f6b83886fceb8aca882fb77f281908c327a GIT binary patch literal 16538 zcmV(rK<>X%Nk&GJKmY(&MM6+kP&golKmY)+;{crjDzN~<0X~&Lm`EuoCZ{pB9T2b* ziACm?E%OvT7G7Vcd*!3dK8$~Rn?1L_PpDt)yU01vcV~TgDcj}e#gEeXFXN}+f4zR~ z|A+R|#=orpCHqb4NAqvPKiK~Z?L+wg`hVkmWBBL(x2RvZy!igRv`cpXL;Gp$7w$*j z`}aPs^<(T$upjiF?p~Jv)A0NJKm31SpVwZHI!b#3*mXEwr!i;ID|6eI%PfXu_!hYV z2bzng1#YM7>}5m8ui9QG>&+q~V^p|=k%00yDi!|dM0e(NRyv(hkMmXfl<{_hR(quAf42n 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STM32G431kB MCU +with a wide range of connectivity support and configurations. +Here are some highlights of the Nucleo G431kB board: + +- STM32 microcontroller in LQFP32 package +- Arduino nano V3 connectivity +- On-board ST-LINK/V3E debugger/programmer +- Flexible board power supply: + + - USB VBUS or external source(3.3V, 5V, 7 - 12V) + - Power management access point + +- Three LEDs: USB communication (LD1), power LED (LD3), user LED (LD2) +- One push-button for RESET + +.. image:: img/nucleo_g431kb.webp + :align: center + :alt: Nucleo G431kB + +More information about the board can be found at the `Nucleo G431KB website`_. + +- Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell* + +More information about STM32G431RB can be found here: + +- `STM32G431KB on www.st.com`_ +- `STM32G4 reference manual`_ + +Supported Features +================== + +The Zephyr ``nucleo_g431kb`` board target supports the following hardware features: + ++-----------+------------+-------------------------------------+ +| Interface | Controller | Driver/Component | ++===========+============+=====================================+ +| NVIC | on-chip | nested vector interrupt controller | ++-----------+------------+-------------------------------------+ +| UART | on-chip | serial port-polling; | +| | | serial port-interrupt | ++-----------+------------+-------------------------------------+ +| PINMUX | on-chip | pinmux | ++-----------+------------+-------------------------------------+ +| GPIO | on-chip | gpio | ++-----------+------------+-------------------------------------+ +| PWM | on-chip | pwm | ++-----------+------------+-------------------------------------+ +| I2C | on-chip | i2c | ++-----------+------------+-------------------------------------+ + +Other hardware features are not yet supported on this Zephyr port. + +The default configuration can be found in the defconfig file: +:zephyr_file:`boards/st/nucleo_g431kb/nucleo_g431kb_defconfig` + + +Connections and IOs +=================== + +Nucleo G431KB Board has 6 GPIO controllers. These controllers are responsible for pin muxing, +input/output, pull-up, etc. + +For more details please refer to `STM32G4 Nucleo-32 board User Manual`_. + +Default Zephyr Peripheral Mapping: +---------------------------------- + +.. rst-class:: rst-columns + +- LPUART_1_TX : PA2 +- LPUART_1_RX : PA3 +- LD2 : PB8 +- PWM_4_CH_3 : PB8 +- I2C_2_SCL : PA9 +- I2C_2_SDA : PA8 + +System Clock +------------ + +The Nucleo G431KB System Clock could be driven by internal or external oscillator, +as well as main PLL clock. By default the external oscillator is not connected to the board. Therefore only the internal +High Speed oscillator is supported. By default System clock is driven by PLL clock at 170MHz, +the PLL is driven by the 16MHz high speed internal oscillator. + +Serial Port +----------- + +Nucleo G431KB board has 1 U(S)ARTs and one LPUART. The Zephyr console output is assigned to LPUART1. +Default settings are 115200 8N1. + +Please note that LPUART1 baudrate is limited to 9600 if the MCU is clocked by LSE (32.768 kHz) in +low power mode. + +Programming and Debugging +************************* + +Nucleo G431KB Board includes an ST-Link/V3 embedded debug tool interface. + +Applications for the ``nucleo_g431kb`` board target can be built and +flashed in the usual way (see :ref:`build_an_application` and +:ref:`application_run` for more details). + +Flashing +======== + +The board is configured to be flashed using west `STM32CubeProgrammer`_ runner, +so its :ref:`installation ` is required. + +Alternatively, OpenOCD, or pyOCD can also be used to flash the board using +the ``--runner`` (or ``-r``) option: + +.. code-block:: console + + $ west flash --runner openocd + $ west flash --runner pyocd + +To enable support of the stm32g342kb SoC in pyocd the pyocd pack for this soc has to be installed first: + +.. code-block:: console + + $ pyocd pack --update + $ pyocd pack --install stm32g431rb + +Flashing an application to Nucleo G431kB +---------------------------------------- + +Connect the Nucleo G431kB to your host computer using the USB port, +then run a serial host program to connect with your Nucleo board. + +.. code-block:: console + + $ minicom -D /dev/ttyACM0 + +Now build and flash an application. Here is an example for +:zephyr:code-sample:`hello_world`. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: nucleo_g431kb + :goals: build flash + +You should see the following message on the console: + +.. code-block:: console + + $ Hello World! nucleo_g431kb/stm32g431xx + +Debugging +========= + +You can debug an application in the usual way. Here is an example for the +:zephyr:code-sample:`hello_world` application. + +.. zephyr-app-commands:: + :zephyr-app: samples/hello_world + :board: nucleo_g431rb + :maybe-skip-config: + :goals: debug + +References +********** + +.. target-notes:: + +.. _Nucleo G431KB website: + https://www.st.com/en/evaluation-tools/nucleo-g431kb.html + +.. _STM32G4 Nucleo-32 board User Manual: + https://www.st.com/resource/en/user_manual/um2397-stm32g4-nucleo32-board-mb1430-stmicroelectronics.pdf + +.. _STM32g431kb Nucleo-32 board schematic: + https://www.st.com/resource/en/schematic_pack/mb1430-g431kbt6-a02_schematic_internal.pdf + +.. _STM32G431KB on www.st.com: + https://www.st.com/en/microcontrollers-microprocessors/stm32g431kb.html + +.. _STM32G4 reference manual: + https://www.st.com/resource/en/reference_manual/rm0440-stm32g4-series-advanced-armbased-32bit-mcus-stmicroelectronics.pdf + +.. _STM32CubeProgrammer: + https://www.st.com/en/development-tools/stm32cubeprog.html \ No newline at end of file diff --git a/boards/st/nucleo_g431kb/nucleo_g431kb.dts b/boards/st/nucleo_g431kb/nucleo_g431kb.dts new file mode 100644 index 000000000000000..db584bf81e9412d --- /dev/null +++ b/boards/st/nucleo_g431kb/nucleo_g431kb.dts @@ -0,0 +1,119 @@ +/* + * Copyright (c) 2024 Klaus Nagel, + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/dts-v1/; +#include +#include + +/ { + model = "STMicroelectronics STM32G431KB-NUCLEO board"; + compatible = "st,stm32g431kb-nucleo"; + + chosen { + zephyr,console = &stlink_serial; + zephyr,shell-uart = &stlink_serial; + zephyr,sram = &sram0; + zephyr,flash = &flash0; + }; + + leds: leds { + compatible = "gpio-leds"; + green_led: led_0 { + gpios = <&gpiob 8 GPIO_ACTIVE_HIGH>; + label = "User LD2"; + }; + + }; + + pwmleds { + compatible = "pwm-leds"; + + green_pwm_led: green_pwm_led { + pwms = <&pwm4 3 PWM_MSEC(20) PWM_POLARITY_NORMAL>; + }; + }; + + + aliases { + led0 = &green_led; + pwm-led0 = &green_pwm_led; + watchdog0 = &iwdg; + }; +}; + +&clk_lsi { + status = "okay"; +}; + +&clk_hsi { + status = "okay"; +}; + +/* Adjust the pll for a SYSTEM Clock of 170MHz */ +&pll { + div-m = <4>; + mul-n = <85>; + div-p = <7>; + div-q = <2>; + div-r = <2>; + clocks = <&clk_hsi>; + status = "okay"; +}; + +&rcc { + clocks = <&pll>; + clock-frequency = ; + ahb-prescaler = <1>; + apb1-prescaler = <1>; + apb2-prescaler = <1>; +}; + +&lpuart1 { + pinctrl-0 = <&lpuart1_tx_pa2 &lpuart1_rx_pa3>; + pinctrl-names = "default"; + current-speed = <115200>; + status = "okay"; +}; + +&timers4 { + st,prescaler = <10000>; + status = "okay"; + + pwm4: pwm { + status = "okay"; + pinctrl-0 = <&tim4_ch3_pb8>; + pinctrl-names = "default"; + }; +}; + +stm32_lp_tick_source: &lptim1 { + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>, + <&rcc STM32_SRC_LSE LPTIM1_SEL(3)>; + status = "okay"; +}; + +&i2c2 { + pinctrl-0 = <&i2c2_scl_pa9 &i2c2_sda_pa8>; + pinctrl-names = "default"; + status = "okay"; +}; + +&flash0 { + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + /* Set 4Kb of storage at the end of the 128Kb of flash */ + storage_partition: partition@1f000 { + label = "storage"; + reg = <0x0001f000 DT_SIZE_K(4)>; + }; + }; +}; + +stlink_serial: &lpuart1{}; diff --git a/boards/st/nucleo_g431kb/nucleo_g431kb.yaml b/boards/st/nucleo_g431kb/nucleo_g431kb.yaml new file mode 100644 index 000000000000000..86e7d6c5d418a03 --- /dev/null +++ b/boards/st/nucleo_g431kb/nucleo_g431kb.yaml @@ -0,0 +1,15 @@ +identifier: nucleo_g431kb +name: ST Nucleo G431KB +type: mcu +arch: arm +toolchain: + - zephyr + - gnuarmemb + - xtools +ram: 32 +flash: 128 +supported: + - gpio + - pwm + - i2c +vendor: st diff --git a/boards/st/nucleo_g431kb/nucleo_g431kb_defconfig b/boards/st/nucleo_g431kb/nucleo_g431kb_defconfig new file mode 100644 index 000000000000000..930b49b771514bd --- /dev/null +++ b/boards/st/nucleo_g431kb/nucleo_g431kb_defconfig @@ -0,0 +1,21 @@ +# SPDX-License-Identifier: Apache-2.0 + +# Serial drivers +CONFIG_SERIAL=y +CONFIG_UART_INTERRUPT_DRIVEN=y + +# Console +CONFIG_CONSOLE=y +CONFIG_UART_CONSOLE=y + +# Enable GPIO +CONFIG_GPIO=y + +# Enable clocks +CONFIG_CLOCK_CONTROL=y + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable HW stack protection +CONFIG_HW_STACK_PROTECTION=y diff --git a/boards/st/nucleo_g431kb/support/openocd.cfg b/boards/st/nucleo_g431kb/support/openocd.cfg new file mode 100644 index 000000000000000..d936f7d353423bc --- /dev/null +++ b/boards/st/nucleo_g431kb/support/openocd.cfg @@ -0,0 +1,7 @@ +source [find interface/stlink.cfg] + +transport select hla_swd + +source [find target/stm32g4x.cfg] + +reset_config srst_only