diff --git a/soc/xtensa/intel_adsp/ace/power.c b/soc/xtensa/intel_adsp/ace/power.c
index e35443d4cf8b7a..4ef8575645a702 100644
--- a/soc/xtensa/intel_adsp/ace/power.c
+++ b/soc/xtensa/intel_adsp/ace/power.c
@@ -150,6 +150,7 @@ static ALWAYS_INLINE void _restore_core_context(void)
 }
 
 void dsp_restore_vector(void);
+void mp_resume_entry(void);
 
 void power_gate_entry(uint32_t core_id)
 {
@@ -180,6 +181,11 @@ void power_gate_exit(void)
 	cpu_early_init();
 	sys_cache_data_flush_and_invd_all();
 	_restore_core_context();
+
+	/* Secondary core is resumed by set_dx */
+	if (arch_proc_id()) {
+		mp_resume_entry();
+	}
 }
 
 __asm__(".align 4\n\t"
diff --git a/soc/xtensa/intel_adsp/cavs/power.c b/soc/xtensa/intel_adsp/cavs/power.c
index c0a75f5c0ecec4..3ae758ced617a1 100644
--- a/soc/xtensa/intel_adsp/cavs/power.c
+++ b/soc/xtensa/intel_adsp/cavs/power.c
@@ -52,6 +52,7 @@ LOG_MODULE_REGISTER(soc);
  * @biref FW entry point called by ROM during normal boot flow
  */
 extern void rom_entry(void);
+void mp_resume_entry(void);
 
 struct core_state {
 	uint32_t a0;
@@ -104,6 +105,11 @@ void power_gate_exit(void)
 	cpu_early_init();
 	sys_cache_data_flush_and_invd_all();
 	_restore_core_context();
+
+	/* Secondary core is resumed by set_dx */
+	if (arch_proc_id()) {
+		mp_resume_entry();
+	}
 }
 
 __asm__(".align 4\n\t"
diff --git a/soc/xtensa/intel_adsp/common/multiprocessing.c b/soc/xtensa/intel_adsp/common/multiprocessing.c
index de76fa37eac0cb..79d7d1883e0651 100644
--- a/soc/xtensa/intel_adsp/common/multiprocessing.c
+++ b/soc/xtensa/intel_adsp/common/multiprocessing.c
@@ -110,6 +110,11 @@ __imr void z_mp_entry(void)
 	__ASSERT(false, "arch_start_cpu() handler should never return");
 }
 
+void mp_resume_entry(void)
+{
+	start_rec.fn(start_rec.arg);
+}
+
 bool arch_cpu_active(int cpu_num)
 {
 	return soc_cpus_active[cpu_num];