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I am new to to qec code and I apologize for any inconvenience .
I was running the tutorial of XXZZ benchmark, but what I got was different than the figures showed in the tutorial. surface_perf1.pdf surface_perf2.pdf
I have checked the d_3_T_1.npz and make sure it is loaded by TopologicalBenchmark. The results remain the same.
Thanks for the help!
The text was updated successfully, but these errors were encountered:
This is because of a relatively recent change in how Qiskit optimizes circuits. Currently, we are inserting noisy identity gates in places where we want to simulate inserting errors. Now, however, Qiskit optimizes the circuit and removes those identity gates, so that no errors are actually inserted in circuit simulations. We are aware of this and have a fix in the works!
Related to and tracked by #62, so closing this issue.
Hi all,
I am new to to qec code and I apologize for any inconvenience .
I was running the tutorial of XXZZ benchmark, but what I got was different than the figures showed in the tutorial.
surface_perf1.pdf
surface_perf2.pdf
I have checked the d_3_T_1.npz and make sure it is loaded by TopologicalBenchmark. The results remain the same.
Thanks for the help!
The text was updated successfully, but these errors were encountered: