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ACPI Requirements

The Advanced Configuration and Power Interface specification provides the OS-centric view of system configuration, various hardware resources, events and power management.

This section defines the BRS-I mandatory and optional ACPI requirements on top of cite:[ACPI] and cite:[UEFI]. Additional non-normative guidance may be found in the appendix.

A compliant system must:

Additional ACPI Table Requirements

This section lists additional requirements for the mandatory and conditionally-required ACPI tables in a compliant system.

PPTT (Processor Properties Table).

The PPTT is mandatory even for systems with a simple hart topology.

Conditionally Required ACPI Tables

This section lists requirements for ACPI tables that depend on features that may not be present in compliant systems. For example, some systems may not have PCIe busses or a serial port.

MCFG

The PCI Memory-mapped Configuration Space (MCFG) table cite:[PCIFW] must only be present if and only if cite:[PCIFW] compatible non-hot-removable PCIe segments are made available to the OS.

  • PCIe configuration space must be exposed to the OS in an ECAM-compatible (Enhanced Configuration Access Mechanism) manner.

  • MCFG table must not require a custom vendor-specific PCIe root complex OS driver.

Please see PCI Services in ACPI (cite:[ACPI], Section 4) for more ACPI requirements relating to PCIe support.

SPCR

The Serial Port Console Redirection Table cite:[SPCR] is required on systems where the graphics hardware is not present or not made available to an OS loader via the standard UEFI EFI_GRAPHICS_OUTPUT_PROTOCOL interface. In these cases, the table provides essential configuration for an early OS boot console.

Additional requirements:

  • Revision 4 or later of SPCR.

  • For NS16550-compatible UARTs:

    • Use Interface Type 0x12 (16550-compatible with parameters defined in Generic Address Structure).

    • There must be a matching AML device object.

ACPI Methods and Objects

This section lists additional requirements for ACPI methods and objects.

Device Methods and Objects

  • _CCA: Cache Coherency Attribute. This object provides information about whether a device has to manage cache coherency and about hardware support. This object is mandatory for all devices that can access CPU-visible memory. (cite:[ACPI] Section 6.2.17)

  • _PRS: Possible Resource Settings. Not supported.

  • _SRS: Set Resource Settings. Not supported.

Harts and Hart Performance Control

Harts must be defined under \_SB (System Bus) namespace and not in the deprecated \_PR (Processors) namespace.

If the platform provides support for OS-directed hart performance control and power management, then it must be exposed using Collaborative Processor Performance Control (CPPC, cite:[ACPI] Section 8.4.6). Processor idle states must be described using Low Power Idle (LPI, cite:[ACPI] Section 8.4.3).

PCIe Root Complex Devices

  • _CRS: Current Resource Settings

    • PCIe Root Complex descriptors must not contain resources of type DWordIO, QWordIO or ExtendedIO as the legacy PCI I/O port space is not supported.

Time and Alarm Device

UEFI Runtime Service should be used to provide time services to the OS, unless the RTC is subject to arbitration issues between concurrent OS and UEFI accesses to the underlying hardware. See [uefi-rtc].

In situations where the Time and Alarm Device (TAD) depends on a vendor-specific OS driver for correct function (SPI, I2C, etc), the TAD must be functional if the OS driver is not loaded. That is, when a dependent driver is loaded, an AML method switches further accesses to go through the driver-backed OperationRegion.