diff --git a/posix/include/sof/lib/dma.h b/posix/include/sof/lib/dma.h index e1d7c2b755fe..43214cc14ae5 100644 --- a/posix/include/sof/lib/dma.h +++ b/posix/include/sof/lib/dma.h @@ -47,6 +47,12 @@ struct comp_buffer; #define DMA_DIR_MEM_TO_DEV BIT(3) /**< local mem to dev copy */ #define DMA_DIR_DEV_TO_MEM BIT(4) /**< dev to local mem copy */ #define DMA_DIR_DEV_TO_DEV BIT(5) /**< dev to dev copy */ +#define SOF_DMA_DIR_MEM_TO_MEM DMA_DIR_MEM_TO_MEM +#define SOF_DMA_DIR_HMEM_TO_LMEM DMA_DIR_HMEM_TO_LMEM +#define SOF_DMA_DIR_LMEM_TO_HMEM DMA_DIR_LMEM_TO_HMEM +#define SOF_DMA_DIR_MEM_TO_DEV DMA_DIR_MEM_TO_DEV +#define SOF_DMA_DIR_DEV_TO_MEM DMA_DIR_DEV_TO_MEM +#define SOF_DMA_DIR_DEV_TO_DEV DMA_DIR_DEV_TO_DEV /* DMA capabilities bitmasks used to define the type of DMA */ #define DMA_CAP_HDA BIT(0) /**< HDA DMA */ @@ -73,6 +79,7 @@ struct comp_buffer; #define DMA_DEV_AFE_MEMIF BIT(10) /**< connectable to AFE fifo */ #define DMA_DEV_SP_VIRTUAL BIT(11) /**< connectable to ACP SP VIRTUAL I2S */ #define DMA_DEV_HS_VIRTUAL BIT(12) /**< connectable to ACP HS VIRTUAL I2S */ +#define SOF_DMA_DEV_HOST DMA_DEV_HOST /* DMA access privilege flag */ #define DMA_ACCESS_EXCLUSIVE 1 @@ -100,6 +107,8 @@ enum dma_irq_cmd { #define DMA_CHAN_INVALID 0xFFFFFFFF #define DMA_CORE_INVALID 0xFFFFFFFF +#define SOF_DMA_CHAN_INVALID DMA_CHAN_INVALID +#define SOF_DMA_CORE_INVALID DMA_CORE_INVALID /* Attributes have been ported to Zephyr. This condition is necessary until full support of * CONFIG_SOF_ZEPHYR_STRICT_HEADERS. diff --git a/src/audio/chain_dma.c b/src/audio/chain_dma.c index d2cc14230ea9..2dd778d7f011 100644 --- a/src/audio/chain_dma.c +++ b/src/audio/chain_dma.c @@ -536,18 +536,18 @@ static int chain_task_init(struct comp_dev *dev, uint8_t host_dma_id, uint8_t li /* request HDA DMA with shared access privilege */ dir = (cd->stream_direction == SOF_IPC_STREAM_PLAYBACK) ? - DMA_DIR_HMEM_TO_LMEM : DMA_DIR_LMEM_TO_HMEM; + SOF_DMA_DIR_HMEM_TO_LMEM : SOF_DMA_DIR_LMEM_TO_HMEM; - cd->dma_host = dma_get(dir, 0, DMA_DEV_HOST, DMA_ACCESS_SHARED); + cd->dma_host = dma_get(dir, 0, SOF_DMA_DEV_HOST, SOF_DMA_ACCESS_SHARED); if (!cd->dma_host) { comp_err(dev, "chain_task_init(): dma_get() returned NULL"); return -EINVAL; } dir = (cd->stream_direction == SOF_IPC_STREAM_PLAYBACK) ? - DMA_DIR_MEM_TO_DEV : DMA_DIR_DEV_TO_MEM; + SOF_DMA_DIR_MEM_TO_DEV : SOF_DMA_DIR_DEV_TO_MEM; - cd->dma_link = dma_get(dir, DMA_CAP_HDA, DMA_DEV_HDA, DMA_ACCESS_SHARED); + cd->dma_link = dma_get(dir, SOF_DMA_CAP_HDA, SOF_DMA_DEV_HDA, SOF_DMA_ACCESS_SHARED); if (!cd->dma_link) { dma_put(cd->dma_host); comp_err(dev, "chain_task_init(): dma_get() returned NULL"); diff --git a/src/audio/dai-zephyr.c b/src/audio/dai-zephyr.c index 58499b8a699f..6c845ff19ea5 100644 --- a/src/audio/dai-zephyr.c +++ b/src/audio/dai-zephyr.c @@ -243,11 +243,11 @@ static int dai_get_fifo(struct dai *dai, int direction, int stream_id) } /* this is called by DMA driver every time descriptor has completed */ -static enum dma_cb_status +static enum sof_dma_cb_status dai_dma_cb(struct dai_data *dd, struct comp_dev *dev, uint32_t bytes, pcm_converter_func *converter) { - enum dma_cb_status dma_status = DMA_CB_STATUS_RELOAD; + enum sof_dma_cb_status dma_status = SOF_DMA_CB_STATUS_RELOAD; int ret; comp_dbg(dev, "dai_dma_cb()"); @@ -258,7 +258,7 @@ dai_dma_cb(struct dai_data *dd, struct comp_dev *dev, uint32_t bytes, dai_trigger_op(dd->dai, COMP_TRIGGER_STOP, dev->direction); /* tell DMA not to reload */ - dma_status = DMA_CB_STATUS_END; + dma_status = SOF_DMA_CB_STATUS_END; } /* is our pipeline handling an XRUN ? */ @@ -401,11 +401,11 @@ dai_dma_cb(struct dai_data *dd, struct comp_dev *dev, uint32_t bytes, } /* this is called by DMA driver every time descriptor has completed */ -static enum dma_cb_status +static enum sof_dma_cb_status dai_dma_multi_endpoint_cb(struct dai_data *dd, struct comp_dev *dev, uint32_t frames, struct comp_buffer *multi_endpoint_buffer) { - enum dma_cb_status dma_status = DMA_CB_STATUS_RELOAD; + enum sof_dma_cb_status dma_status = SOF_DMA_CB_STATUS_RELOAD; uint32_t i, bytes; comp_dbg(dev, "dai_dma_multi_endpoint_cb()"); @@ -416,7 +416,7 @@ dai_dma_multi_endpoint_cb(struct dai_data *dd, struct comp_dev *dev, uint32_t fr dai_trigger_op(dd->dai, COMP_TRIGGER_STOP, dev->direction); /* tell DMA not to reload */ - dma_status = DMA_CB_STATUS_END; + dma_status = SOF_DMA_CB_STATUS_END; } /* is our pipeline handling an XRUN ? */ @@ -477,9 +477,9 @@ int dai_common_new(struct dai_data *dd, struct comp_dev *dev, /* request GP LP DMA with shared access privilege */ dir = dai_cfg->direction == SOF_IPC_STREAM_PLAYBACK ? - DMA_DIR_MEM_TO_DEV : DMA_DIR_DEV_TO_MEM; + SOF_DMA_DIR_MEM_TO_DEV : SOF_DMA_DIR_DEV_TO_MEM; - dd->dma = dma_get(dir, dd->dai->dma_caps, dd->dai->dma_dev, DMA_ACCESS_SHARED); + dd->dma = dma_get(dir, dd->dai->dma_caps, dd->dai->dma_dev, SOF_DMA_ACCESS_SHARED); if (!dd->dma) { dai_put(dd->dai); comp_err(dev, "dma_get() failed to get shared access to DMA."); @@ -730,13 +730,13 @@ static int dai_set_sg_config(struct dai_data *dd, struct comp_dev *dev, uint32_t /* set up DMA configuration */ if (dev->direction == SOF_IPC_STREAM_PLAYBACK) { dd->process = pcm_get_conversion_function(local_fmt, dma_fmt); - config->direction = DMA_DIR_MEM_TO_DEV; + config->direction = SOF_DMA_DIR_MEM_TO_DEV; err = dai_get_dma_slot(dd, dev, &config->dest_dev); if (err < 0) return err; } else { dd->process = pcm_get_conversion_function(dma_fmt, local_fmt); - config->direction = DMA_DIR_DEV_TO_MEM; + config->direction = SOF_DMA_DIR_DEV_TO_MEM; err = dai_get_dma_slot(dd, dev, &config->src_dev); if (err < 0) return err; @@ -1123,7 +1123,7 @@ int dai_common_config_prepare(struct dai_data *dd, struct comp_dev *dev) comp_dbg(dev, "channel = %d", channel); /* do nothing for asking for channel free, for compatibility. */ - if (channel == DMA_CHAN_INVALID) { + if (channel == SOF_DMA_CHAN_INVALID) { comp_err(dev, "dai_config is not set yet!"); return -EINVAL; } @@ -1292,7 +1292,7 @@ static int dai_comp_trigger_internal(struct dai_data *dd, struct comp_dev *dev, * Only applies to non HD-DMA links as HD-DMA read/write pointer * is not reset during stop/config/start */ - if (!(dd->dai->dma_caps & DMA_CAP_HDA)) + if (!(dd->dai->dma_caps & SOF_DMA_CAP_HDA)) audio_stream_reset(&dd->dma_buffer->stream); /* only start the DAI if we are not XRUN handling */ @@ -1543,7 +1543,7 @@ int dai_zephyr_multi_endpoint_copy(struct dai_data **dd, struct comp_dev *dev, } for (i = 0; i < num_endpoints; i++) { - enum dma_cb_status status; + enum sof_dma_cb_status status; uint32_t copy_bytes; /* trigger optional DAI_TRIGGER_COPY which prepares dai to copy */ @@ -1552,7 +1552,7 @@ int dai_zephyr_multi_endpoint_copy(struct dai_data **dd, struct comp_dev *dev, comp_warn(dev, "dai trigger copy failed"); status = dai_dma_multi_endpoint_cb(dd[i], dev, frames, multi_endpoint_buffer); - if (status == DMA_CB_STATUS_END) + if (status == SOF_DMA_CB_STATUS_END) dma_stop(dd[i]->chan->dma->z_dev, dd[i]->chan->index); copy_bytes = frames * audio_stream_frame_bytes(&dd[i]->dma_buffer->stream); @@ -1742,7 +1742,7 @@ int dai_common_copy(struct dai_data *dd, struct comp_dev *dev, pcm_converter_fun if (ret < 0) comp_warn(dev, "dai trigger copy failed"); - if (dai_dma_cb(dd, dev, copy_bytes, converter) == DMA_CB_STATUS_END) + if (dai_dma_cb(dd, dev, copy_bytes, converter) == SOF_DMA_CB_STATUS_END) dma_stop(dd->chan->dma->z_dev, dd->chan->index); ret = dma_reload(dd->chan->dma->z_dev, dd->chan->index, 0, 0, copy_bytes); diff --git a/src/audio/host-zephyr.c b/src/audio/host-zephyr.c index 6addb947f7c0..14412c2a8254 100644 --- a/src/audio/host-zephyr.c +++ b/src/audio/host-zephyr.c @@ -512,7 +512,7 @@ static int create_local_elems(struct host_data *hd, struct comp_dev *dev, uint32 int err; dir = direction == SOF_IPC_STREAM_PLAYBACK ? - DMA_DIR_HMEM_TO_LMEM : DMA_DIR_LMEM_TO_HMEM; + SOF_DMA_DIR_HMEM_TO_LMEM : SOF_DMA_DIR_LMEM_TO_HMEM; /* if host buffer set we need to allocate local buffer */ if (hd->host.elem_array.count) { @@ -612,9 +612,9 @@ int host_common_new(struct host_data *hd, struct comp_dev *dev, hd->ipc_host = *ipc_host; /* request HDA DMA with shared access privilege */ dir = hd->ipc_host.direction == SOF_IPC_STREAM_PLAYBACK ? - DMA_DIR_HMEM_TO_LMEM : DMA_DIR_LMEM_TO_HMEM; + SOF_DMA_DIR_HMEM_TO_LMEM : SOF_DMA_DIR_LMEM_TO_HMEM; - hd->dma = dma_get(dir, 0, DMA_DEV_HOST, DMA_ACCESS_SHARED); + hd->dma = dma_get(dir, 0, SOF_DMA_DEV_HOST, SOF_DMA_ACCESS_SHARED); if (!hd->dma) { comp_err(dev, "dma_get() returned NULL"); return -ENODEV; @@ -806,11 +806,11 @@ int host_common_params(struct host_data *hd, struct comp_dev *dev, /* determine source and sink buffer elements */ if (params->direction == SOF_IPC_STREAM_PLAYBACK) { - config->direction = DMA_DIR_HMEM_TO_LMEM; + config->direction = SOF_DMA_DIR_HMEM_TO_LMEM; hd->source = &hd->host; hd->sink = &hd->local; } else { - config->direction = DMA_DIR_LMEM_TO_HMEM; + config->direction = SOF_DMA_DIR_LMEM_TO_HMEM; hd->source = &hd->local; hd->sink = &hd->host; } @@ -923,8 +923,8 @@ int host_common_params(struct host_data *hd, struct comp_dev *dev, for (i = 0; i < config->elem_array.count; i++) { sg_elem = config->elem_array.elems + i; - if (config->direction == DMA_DIR_HMEM_TO_LMEM || - config->direction == DMA_DIR_DEV_TO_MEM) + if (config->direction == SOF_DMA_DIR_HMEM_TO_LMEM || + config->direction == SOF_DMA_DIR_DEV_TO_MEM) addr = sg_elem->dest; else addr = sg_elem->src; @@ -938,12 +938,12 @@ int host_common_params(struct host_data *hd, struct comp_dev *dev, dma_block_cfg->block_size = buffer_bytes; switch (config->direction) { - case DMA_DIR_LMEM_TO_HMEM: + case SOF_DMA_DIR_LMEM_TO_HMEM: dma_cfg->channel_direction = MEMORY_TO_HOST; dma_block_cfg->source_address = buffer_addr; dma_block_cfg->dest_address = hd->config.elem_array.elems[0].dest; break; - case DMA_DIR_HMEM_TO_LMEM: + case SOF_DMA_DIR_HMEM_TO_LMEM: dma_cfg->channel_direction = HOST_TO_MEMORY; dma_block_cfg->dest_address = buffer_addr; dma_block_cfg->source_address = hd->config.elem_array.elems[0].src; diff --git a/src/drivers/generic/dummy-dma.c b/src/drivers/generic/dummy-dma.c index 62112c6198f7..8b710d31b930 100644 --- a/src/drivers/generic/dummy-dma.c +++ b/src/drivers/generic/dummy-dma.c @@ -348,8 +348,8 @@ static int dummy_dma_set_config(struct dma_chan_data *channel, channel->direction = config->direction; - if (config->direction != DMA_DIR_HMEM_TO_LMEM && - config->direction != DMA_DIR_LMEM_TO_HMEM) { + if (config->direction != SOF_DMA_DIR_HMEM_TO_LMEM && + config->direction != SOF_DMA_DIR_LMEM_TO_HMEM) { /* Shouldn't even happen though */ tr_err(&ddma_tr, "dummy-dmac: %d channel %d invalid direction %d", channel->dma->plat_data.id, channel->index, @@ -490,10 +490,10 @@ static int dummy_dma_get_data_size(struct dma_chan_data *channel, uint32_t size = dummy_dma_compute_avail_data(pdata); switch (channel->direction) { - case DMA_DIR_HMEM_TO_LMEM: + case SOF_DMA_DIR_HMEM_TO_LMEM: *avail = size; break; - case DMA_DIR_LMEM_TO_HMEM: + case SOF_DMA_DIR_LMEM_TO_HMEM: *free = size; break; default: diff --git a/src/drivers/imx/ipc.c b/src/drivers/imx/ipc.c index 919323935cc1..0f3f6edca76b 100644 --- a/src/drivers/imx/ipc.c +++ b/src/drivers/imx/ipc.c @@ -207,8 +207,8 @@ int platform_ipc_init(struct ipc *ipc) PLATFORM_PAGE_TABLE_SIZE); if (iipc->dh_buffer.page_table) bzero(iipc->dh_buffer.page_table, PLATFORM_PAGE_TABLE_SIZE); - iipc->dh_buffer.dmac = dma_get(DMA_DIR_HMEM_TO_LMEM, 0, DMA_DEV_HOST, - DMA_ACCESS_SHARED); + iipc->dh_buffer.dmac = dma_get(SOF_DMA_DIR_HMEM_TO_LMEM, 0, SOF_DMA_DEV_HOST, + SOF_DMA_ACCESS_SHARED); if (!iipc->dh_buffer.dmac) { tr_err(&ipc_tr, "Unable to find DMA for host page table"); sof_panic(SOF_IPC_PANIC_IPC); diff --git a/src/drivers/imx/micfil.c b/src/drivers/imx/micfil.c index c6e366198a5f..66cc88639e15 100644 --- a/src/drivers/imx/micfil.c +++ b/src/drivers/imx/micfil.c @@ -319,7 +319,7 @@ const struct dai_driver micfil_driver = { .type = SOF_DAI_IMX_MICFIL, .uid = SOF_UUID(micfil_uuid), .tctx = &micfil_tr, - .dma_dev = DMA_DEV_MICFIL, + .dma_dev = SOF_DMA_DEV_MICFIL, .ops = { .trigger = micfil_trigger, .set_config = micfil_set_config, diff --git a/src/drivers/imx/sai.c b/src/drivers/imx/sai.c index 7a6e529f1b0a..7971b76a8b7f 100644 --- a/src/drivers/imx/sai.c +++ b/src/drivers/imx/sai.c @@ -560,7 +560,7 @@ const struct dai_driver sai_driver = { .type = SOF_DAI_IMX_SAI, .uid = SOF_UUID(sai_uuid), .tctx = &sai_tr, - .dma_dev = DMA_DEV_SAI, + .dma_dev = SOF_DMA_DEV_SAI, .ops = { .trigger = sai_trigger, .set_config = sai_set_config, diff --git a/src/drivers/imx/sdma.c b/src/drivers/imx/sdma.c index 6ceac01de098..6f24e9c0c8b4 100644 --- a/src/drivers/imx/sdma.c +++ b/src/drivers/imx/sdma.c @@ -664,20 +664,20 @@ static int sdma_read_config(struct dma_chan_data *channel, uint32_t dma_dev = dd->dai->drv->dma_dev; switch (config->direction) { - case DMA_DIR_MEM_TO_DEV: + case SOF_DMA_DIR_MEM_TO_DEV: pdata->hw_event = config->dest_dev; pdata->sdma_chan_type = SDMA_CHAN_TYPE_MCU2SHP; pdata->fifo_paddr = config->elem_array.elems[0].dest; break; - case DMA_DIR_DEV_TO_MEM: + case SOF_DMA_DIR_DEV_TO_MEM: pdata->hw_event = config->src_dev; - if (dma_dev == DMA_DEV_MICFIL) + if (dma_dev == SOF_DMA_DEV_MICFIL) pdata->sdma_chan_type = SDMA_CHAN_TYPE_SAI2MCU; else pdata->sdma_chan_type = SDMA_CHAN_TYPE_SHP2MCU; pdata->fifo_paddr = config->elem_array.elems[0].src; break; - case DMA_DIR_MEM_TO_MEM: + case SOF_DMA_DIR_MEM_TO_MEM: pdata->sdma_chan_type = SDMA_CHAN_TYPE_AP2AP; /* Fallthrough, TODO: implement to support m2m */ default: @@ -687,13 +687,13 @@ static int sdma_read_config(struct dma_chan_data *channel, } for (i = 0; i < config->elem_array.count; i++) { - if (config->direction == DMA_DIR_MEM_TO_DEV && + if (config->direction == SOF_DMA_DIR_MEM_TO_DEV && pdata->fifo_paddr != config->elem_array.elems[i].dest) { tr_err(&sdma_tr, "sdma_read_config: FIFO changes address!"); return -EINVAL; } - if (config->direction == DMA_DIR_DEV_TO_MEM && + if (config->direction == SOF_DMA_DIR_DEV_TO_MEM && pdata->fifo_paddr != config->elem_array.elems[i].src) { tr_err(&sdma_tr, "sdma_read_config: FIFO changes address!"); return -EINVAL; @@ -768,15 +768,15 @@ static int sdma_prep_desc(struct dma_chan_data *channel, * is in buf_xaddr. */ switch (config->direction) { - case DMA_DIR_MEM_TO_DEV: + case SOF_DMA_DIR_MEM_TO_DEV: bd->buf_addr = config->elem_array.elems[i].src; width = config->src_width; break; - case DMA_DIR_DEV_TO_MEM: + case SOF_DMA_DIR_DEV_TO_MEM: bd->buf_addr = config->elem_array.elems[i].dest; width = config->dest_width; break; - case DMA_DIR_MEM_TO_MEM: + case SOF_DMA_DIR_MEM_TO_MEM: bd->buf_addr = config->elem_array.elems[i].src; bd->buf_xaddr = config->elem_array.elems[i].dest; width = config->dest_width; @@ -985,10 +985,10 @@ static int sdma_get_data_size(struct dma_chan_data *channel, uint32_t *avail, *avail = *free = 0; switch (channel->direction) { - case DMA_DIR_MEM_TO_DEV: + case SOF_DMA_DIR_MEM_TO_DEV: *free = result_data; break; - case DMA_DIR_DEV_TO_MEM: + case SOF_DMA_DIR_DEV_TO_MEM: *avail = result_data; break; default: diff --git a/src/ipc/ipc3/dai.c b/src/ipc/ipc3/dai.c index 508c07cbb065..a32d80392962 100644 --- a/src/ipc/ipc3/dai.c +++ b/src/ipc/ipc3/dai.c @@ -102,7 +102,7 @@ int dai_config_dma_channel(struct dai_data *dd, struct comp_dev *dev, const void /* other types of DAIs not handled for now */ comp_err(dev, "dai_config_dma_channel(): Unknown dai type %d", config->type); - channel = DMA_CHAN_INVALID; + channel = SOF_DMA_CHAN_INVALID; break; } @@ -367,7 +367,7 @@ int dai_config(struct dai_data *dd, struct comp_dev *dev, struct ipc_config_dai } #endif /* do nothing for asking for channel free, for compatibility. */ - if (dai_config_dma_channel(dd, dev, spec_config) == DMA_CHAN_INVALID) + if (dai_config_dma_channel(dd, dev, spec_config) == SOF_DMA_CHAN_INVALID) return 0; /* allocated dai_config if not yet */ diff --git a/src/ipc/ipc4/dai.c b/src/ipc/ipc4/dai.c index 8a0cdb7fcd58..5c5a12ee8927 100644 --- a/src/ipc/ipc4/dai.c +++ b/src/ipc/ipc4/dai.c @@ -92,10 +92,10 @@ int dai_config_dma_channel(struct dai_data *dd, struct comp_dev *dev, const void if (!cd->gtw_cfg) { comp_err(dev, "No gateway config found!"); - return DMA_CHAN_INVALID; + return SOF_DMA_CHAN_INVALID; } - channel = DMA_CHAN_INVALID; + channel = SOF_DMA_CHAN_INVALID; const struct sof_alh_configuration_blob *alh_blob = cd->gtw_cfg; for (int i = 0; i < alh_blob->alh_cfg.count; i++) { @@ -118,7 +118,7 @@ int dai_config_dma_channel(struct dai_data *dd, struct comp_dev *dev, const void default: /* other types of DAIs not handled for now */ comp_err(dev, "dai_config_dma_channel(): Unknown dai type %d", dai->type); - channel = DMA_CHAN_INVALID; + channel = SOF_DMA_CHAN_INVALID; break; } @@ -367,7 +367,7 @@ int dai_config(struct dai_data *dd, struct comp_dev *dev, struct ipc_config_dai } #endif /* do nothing for asking for channel free, for compatibility. */ - if (dai_config_dma_channel(dd, dev, spec_config) == DMA_CHAN_INVALID) + if (dai_config_dma_channel(dd, dev, spec_config) == SOF_DMA_CHAN_INVALID) return 0; dd->dai_dev = dev; diff --git a/src/lib/dai.c b/src/lib/dai.c index 4e48641679a7..1a3a49ab3596 100644 --- a/src/lib/dai.c +++ b/src/lib/dai.c @@ -173,32 +173,32 @@ static void dai_set_device_params(struct dai *d) { switch (d->type) { case SOF_DAI_INTEL_SSP: - d->dma_dev = DMA_DEV_SSP; + d->dma_dev = SOF_DMA_DEV_SSP; #ifdef CONFIG_DMA_INTEL_ADSP_GPDMA - d->dma_caps = DMA_CAP_GP_LP | DMA_CAP_GP_HP; + d->dma_caps = SOF_DMA_CAP_GP_LP | SOF_DMA_CAP_GP_HP; #else - d->dma_caps = DMA_CAP_HDA; + d->dma_caps = SOF_DMA_CAP_HDA; #endif break; case SOF_DAI_INTEL_DMIC: - d->dma_dev = DMA_DEV_DMIC; + d->dma_dev = SOF_DMA_DEV_DMIC; #ifdef CONFIG_DMA_INTEL_ADSP_GPDMA - d->dma_caps = DMA_CAP_GP_LP | DMA_CAP_GP_HP; + d->dma_caps = SOF_DMA_CAP_GP_LP | SOF_DMA_CAP_GP_HP; #else - d->dma_caps = DMA_CAP_HDA; + d->dma_caps = SOF_DMA_CAP_HDA; #endif break; case SOF_DAI_INTEL_ALH: - d->dma_dev = DMA_DEV_ALH; + d->dma_dev = SOF_DMA_DEV_ALH; #ifdef CONFIG_DMA_INTEL_ADSP_GPDMA - d->dma_caps = DMA_CAP_GP_LP | DMA_CAP_GP_HP; + d->dma_caps = SOF_DMA_CAP_GP_LP | SOF_DMA_CAP_GP_HP; #else - d->dma_caps = DMA_CAP_HDA; + d->dma_caps = SOF_DMA_CAP_HDA; #endif break; case SOF_DAI_INTEL_HDA: - d->dma_dev = DMA_DEV_HDA; - d->dma_caps = DMA_CAP_HDA; + d->dma_dev = SOF_DMA_DEV_HDA; + d->dma_caps = SOF_DMA_CAP_HDA; break; default: break; diff --git a/src/lib/dma.c b/src/lib/dma.c index d95633c45234..677de0471afd 100644 --- a/src/lib/dma.c +++ b/src/lib/dma.c @@ -59,7 +59,7 @@ struct dma *dma_get(uint32_t dir, uint32_t cap, uint32_t dev, uint32_t flags) continue; /* if exclusive access is requested */ - if (flags & DMA_ACCESS_EXCLUSIVE) { + if (flags & SOF_DMA_ACCESS_EXCLUSIVE) { /* ret DMA with no users */ if (!d->sref) { dmin = d; @@ -299,8 +299,8 @@ int dma_sg_alloc(struct dma_sg_elem_array *elem_array, elem_array->elems[i].size = buffer_bytes; // TODO: may count offsets once switch (direction) { - case DMA_DIR_MEM_TO_DEV: - case DMA_DIR_LMEM_TO_HMEM: + case SOF_DMA_DIR_MEM_TO_DEV: + case SOF_DMA_DIR_LMEM_TO_HMEM: elem_array->elems[i].src = dma_buffer_addr; elem_array->elems[i].dest = external_addr; break; diff --git a/src/library_manager/lib_manager.c b/src/library_manager/lib_manager.c index 350625cae70e..2280ce5bc4a1 100644 --- a/src/library_manager/lib_manager.c +++ b/src/library_manager/lib_manager.c @@ -746,8 +746,8 @@ static int lib_manager_dma_init(struct lib_manager_dma_ext *dma_ext, uint32_t dm /* Initialize dma_ext with zeros */ memset(dma_ext, 0, sizeof(struct lib_manager_dma_ext)); /* request DMA in the dir HMEM->LMEM */ - dma_ext->dma = dma_get(DMA_DIR_HMEM_TO_LMEM, 0, DMA_DEV_HOST, - DMA_ACCESS_EXCLUSIVE); + dma_ext->dma = dma_get(SOF_DMA_DIR_HMEM_TO_LMEM, 0, SOF_DMA_DEV_HOST, + SOF_DMA_ACCESS_EXCLUSIVE); if (!dma_ext->dma) { tr_err(&lib_manager_tr, "lib_manager_dma_init(): dma_ext->dma = NULL"); diff --git a/src/platform/imx8/lib/dma.c b/src/platform/imx8/lib/dma.c index 58789612d712..e5a40d251557 100644 --- a/src/platform/imx8/lib/dma.c +++ b/src/platform/imx8/lib/dma.c @@ -26,8 +26,8 @@ static SHARED_DATA struct dma dma[PLATFORM_NUM_DMACS] = { { .plat_data = { .id = DMA_ID_EDMA0, - .dir = DMA_DIR_MEM_TO_DEV | DMA_DIR_DEV_TO_MEM, - .devs = DMA_DEV_ESAI | DMA_DEV_SAI, + .dir = SOF_DMA_DIR_MEM_TO_DEV | SOF_DMA_DIR_DEV_TO_MEM, + .devs = SOF_DMA_DEV_ESAI | SOF_DMA_DEV_SAI, .base = EDMA0_BASE, .chan_size = EDMA0_SIZE, .channels = 32, @@ -38,8 +38,8 @@ static SHARED_DATA struct dma dma[PLATFORM_NUM_DMACS] = { { .plat_data = { .id = DMA_ID_HOST, - .dir = DMA_DIR_HMEM_TO_LMEM | DMA_DIR_LMEM_TO_HMEM, - .devs = DMA_DEV_HOST, + .dir = SOF_DMA_DIR_HMEM_TO_LMEM | SOF_DMA_DIR_LMEM_TO_HMEM, + .devs = SOF_DMA_DEV_HOST, .channels = 16, }, .ops = &dummy_dma_ops, diff --git a/src/platform/imx8m/lib/dma.c b/src/platform/imx8m/lib/dma.c index ca02d52904ad..ddcfc663bfac 100644 --- a/src/platform/imx8m/lib/dma.c +++ b/src/platform/imx8m/lib/dma.c @@ -18,8 +18,8 @@ static SHARED_DATA struct dma dma[PLATFORM_NUM_DMACS] = { { .plat_data = { .id = DMA_ID_HOST, - .dir = DMA_DIR_HMEM_TO_LMEM | DMA_DIR_LMEM_TO_HMEM, - .devs = DMA_DEV_HOST, + .dir = SOF_DMA_DIR_HMEM_TO_LMEM | SOF_DMA_DIR_LMEM_TO_HMEM, + .devs = SOF_DMA_DEV_HOST, .channels = 16, }, .ops = &dummy_dma_ops, @@ -30,8 +30,8 @@ static SHARED_DATA struct dma dma[PLATFORM_NUM_DMACS] = { /* Note: support is available for MEM_TO_MEM but not * enabled as it is unneeded */ - .dir = DMA_DIR_MEM_TO_DEV | DMA_DIR_DEV_TO_MEM, - .devs = DMA_DEV_SAI | DMA_DEV_MICFIL, + .dir = SOF_DMA_DIR_MEM_TO_DEV | SOF_DMA_DIR_DEV_TO_MEM, + .devs = SOF_DMA_DEV_SAI | SOF_DMA_DEV_MICFIL, .base = SDMA3_BASE, .channels = 32, .irq = SDMA3_IRQ, diff --git a/src/probe/probe.c b/src/probe/probe.c index a079f6f42a84..564ed77c4430 100644 --- a/src/probe/probe.c +++ b/src/probe/probe.c @@ -142,8 +142,8 @@ static int probe_dma_init(struct probe_dma_ext *dma, uint32_t direction) channel = dma->stream_tag; #endif /* request DMA in the dir LMEM->HMEM with shared access */ - dma->dc.dmac = dma_get(direction, 0, DMA_DEV_HOST, - DMA_ACCESS_SHARED); + dma->dc.dmac = dma_get(direction, 0, SOF_DMA_DEV_HOST, + SOF_DMA_ACCESS_SHARED); if (!dma->dc.dmac) { tr_err(&pr_tr, "probe_dma_init(): dma->dc.dmac = NULL"); return -ENODEV; @@ -198,8 +198,8 @@ static int probe_dma_init(struct probe_dma_ext *dma, uint32_t direction) channel = ((union ipc4_connector_node_id)dma->stream_tag).f.v_index; /* request DMA in the dir LMEM->HMEM with shared access */ - dma->dc.dmac = dma_get(direction, 0, DMA_DEV_HOST, - DMA_ACCESS_SHARED); + dma->dc.dmac = dma_get(direction, 0, SOF_DMA_DEV_HOST, + SOF_DMA_ACCESS_SHARED); if (!dma->dc.dmac) { tr_err(&pr_tr, "probe_dma_init(): dma->dc.dmac = NULL"); return -ENODEV; @@ -230,11 +230,11 @@ static int probe_dma_init(struct probe_dma_ext *dma, uint32_t direction) dma_block_cfg.block_size = (uint32_t)dma->dmapb.size; switch (direction) { - case DMA_DIR_LMEM_TO_HMEM: + case SOF_DMA_DIR_LMEM_TO_HMEM: dma_cfg.channel_direction = MEMORY_TO_HOST; dma_block_cfg.source_address = (uint32_t)dma->dmapb.addr; break; - case DMA_DIR_HMEM_TO_LMEM: + case SOF_DMA_DIR_HMEM_TO_LMEM: dma_cfg.channel_direction = HOST_TO_MEMORY; dma_block_cfg.dest_address = (uint32_t)dma->dmapb.addr; break; @@ -368,7 +368,7 @@ int probe_init(const struct probe_dma *probe_dma) _probe->ext_dma.stream_tag = probe_dma->stream_tag; _probe->ext_dma.dma_buffer_size = probe_dma->dma_buffer_size; - err = probe_dma_init(&_probe->ext_dma, DMA_DIR_LMEM_TO_HMEM); + err = probe_dma_init(&_probe->ext_dma, SOF_DMA_DIR_LMEM_TO_HMEM); if (err < 0) { tr_err(&pr_tr, "probe_init(): probe_dma_init() failed"); _probe->ext_dma.stream_tag = PROBE_DMA_INVALID; @@ -506,7 +506,7 @@ int probe_dma_add(uint32_t count, const struct probe_dma *probe_dma) probe_dma[i].dma_buffer_size; err = probe_dma_init(&_probe->inject_dma[first_free], - DMA_DIR_HMEM_TO_LMEM); + SOF_DMA_DIR_HMEM_TO_LMEM); if (err < 0) { tr_err(&pr_tr, "probe_dma_add(): probe_dma_init() failed"); _probe->inject_dma[first_free].stream_tag = diff --git a/xtos/include/sof/lib/dma.h b/xtos/include/sof/lib/dma.h index fdf359f3ac7a..95e408124f0c 100644 --- a/xtos/include/sof/lib/dma.h +++ b/xtos/include/sof/lib/dma.h @@ -46,6 +46,12 @@ struct comp_buffer; #define DMA_DIR_MEM_TO_DEV BIT(3) /**< local mem to dev copy */ #define DMA_DIR_DEV_TO_MEM BIT(4) /**< dev to local mem copy */ #define DMA_DIR_DEV_TO_DEV BIT(5) /**< dev to dev copy */ +#define SOF_DMA_DIR_MEM_TO_MEM DMA_DIR_MEM_TO_MEM +#define SOF_DMA_DIR_HMEM_TO_LMEM DMA_DIR_HMEM_TO_LMEM +#define SOF_DMA_DIR_LMEM_TO_HMEM DMA_DIR_LMEM_TO_HMEM +#define SOF_DMA_DIR_MEM_TO_DEV DMA_DIR_MEM_TO_DEV +#define SOF_DMA_DIR_DEV_TO_MEM DMA_DIR_DEV_TO_MEM +#define SOF_DMA_DIR_DEV_TO_DEV DMA_DIR_DEV_TO_DEV /* DMA capabilities bitmasks used to define the type of DMA */ #define DMA_CAP_HDA BIT(0) /**< HDA DMA */ @@ -77,10 +83,16 @@ struct comp_buffer; #define DMA_DEV_HS BIT(13) /**< connectable to ACP HS I2S */ #define DMA_DEV_MICFIL BIT(14) /**< connectable to MICFIL fifo */ #define DMA_DEV_SW BIT(15) /**< connectable to ACP SW */ +#define SOF_DMA_DEV_HOST DMA_DEV_HOST +#define SOF_DMA_DEV_SAI DMA_DEV_SAI +#define SOF_DMA_DEV_ESAI DMA_DEV_ESAI +#define SOF_DMA_DEV_MICFIL DMA_DEV_MICFIL /* DMA access privilege flag */ #define DMA_ACCESS_EXCLUSIVE 1 #define DMA_ACCESS_SHARED 0 +#define SOF_DMA_ACCESS_EXCLUSIVE DMA_ACCESS_EXCLUSIVE +#define SOF_DMA_ACCESS_SHARED DMA_ACCESS_SHARED /* DMA copy flags */ #define DMA_COPY_BLOCKING BIT(0) @@ -104,6 +116,8 @@ enum dma_irq_cmd { #define DMA_CHAN_INVALID 0xFFFFFFFF #define DMA_CORE_INVALID 0xFFFFFFFF +#define SOF_DMA_CHAN_INVALID DMA_CHAN_INVALID +#define SOF_DMA_CORE_INVALID DMA_CORE_INVALID /* DMA attributes */ #define DMA_ATTR_BUFFER_ALIGNMENT 0 diff --git a/zephyr/include/sof/lib/dma-legacy.h b/zephyr/include/sof/lib/dma-legacy.h index a9cec37ab0d5..f121f601200b 100644 --- a/zephyr/include/sof/lib/dma-legacy.h +++ b/zephyr/include/sof/lib/dma-legacy.h @@ -12,6 +12,26 @@ #define DMA_ATTR_BUFFER_ADDRESS_ALIGNMENT 2 #define DMA_ATTR_BUFFER_PERIOD_COUNT 3 +/* Compatibility for definitions without SOF_ namespace */ +#define DMA_DIR_MEM_TO_MEM SOF_DMA_DIR_MEM_TO_MEM +#define DMA_DIR_HMEM_TO_LMEM SOF_DMA_DIR_HMEM_TO_LMEM +#define DMA_DIR_LMEM_TO_HMEM SOF_DMA_DIR_LMEM_TO_HMEM +#define DMA_DIR_MEM_TO_DEV SOF_DMA_DIR_MEM_TO_DEV +#define DMA_DIR_DEV_TO_MEM SOF_DMA_DIR_DEV_TO_MEM +#define DMA_DIR_DEV_TO_DEV SOF_DMA_DIR_DEV_TO_DEV +#define DMA_COPY_BLOCKING SOF_DMA_COPY_BLOCKING +#define DMA_COPY_ONE_SHOT SOF_DMA_COPY_ONE_SHOT +#define DMA_DEV_HOST SOF_DMA_DEV_HOST +#define DMA_ACCESS_EXCLUSIVE SOF_DMA_ACCESS_EXCLUSIVE +#define DMA_ACCESS_SHARED SOF_DMA_ACCESS_SHARED +#define DMA_CHAN_INVALID SOF_DMA_CHAN_INVALID +#define DMA_CORE_INVALID SOF_DMA_CORE_INVALID + +enum dma_cb_status { + DMA_CB_STATUS_RELOAD = 0, + DMA_CB_STATUS_END, +}; + /* DMA interrupt commands */ enum dma_irq_cmd { DMA_IRQ_STATUS_GET = 0, diff --git a/zephyr/include/sof/lib/dma.h b/zephyr/include/sof/lib/dma.h index 99e8cda67a8b..9bc1e40cf23a 100644 --- a/zephyr/include/sof/lib/dma.h +++ b/zephyr/include/sof/lib/dma.h @@ -61,62 +61,62 @@ struct comp_buffer; */ /* DMA direction bitmasks used to define DMA copy direction */ -#define DMA_DIR_MEM_TO_MEM BIT(0) /**< local memory copy */ -#define DMA_DIR_HMEM_TO_LMEM BIT(1) /**< host memory to local mem copy */ -#define DMA_DIR_LMEM_TO_HMEM BIT(2) /**< local mem to host mem copy */ -#define DMA_DIR_MEM_TO_DEV BIT(3) /**< local mem to dev copy */ -#define DMA_DIR_DEV_TO_MEM BIT(4) /**< dev to local mem copy */ -#define DMA_DIR_DEV_TO_DEV BIT(5) /**< dev to dev copy */ +#define SOF_DMA_DIR_MEM_TO_MEM BIT(0) /**< local memory copy */ +#define SOF_DMA_DIR_HMEM_TO_LMEM BIT(1) /**< host memory to local mem copy */ +#define SOF_DMA_DIR_LMEM_TO_HMEM BIT(2) /**< local mem to host mem copy */ +#define SOF_DMA_DIR_MEM_TO_DEV BIT(3) /**< local mem to dev copy */ +#define SOF_DMA_DIR_DEV_TO_MEM BIT(4) /**< dev to local mem copy */ +#define SOF_DMA_DIR_DEV_TO_DEV BIT(5) /**< dev to dev copy */ /* DMA capabilities bitmasks used to define the type of DMA */ -#define DMA_CAP_HDA BIT(0) /**< HDA DMA */ -#define DMA_CAP_GP_LP BIT(1) /**< GP LP DMA */ -#define DMA_CAP_GP_HP BIT(2) /**< GP HP DMA */ -#define DMA_CAP_BT BIT(3) /**< BT DMA */ -#define DMA_CAP_SP BIT(4) /**< SP DMA */ -#define DMA_CAP_DMIC BIT(5) /**< ACP DMA DMIC > */ -#define DMA_CAP_SP_VIRTUAL BIT(6) /**< SP VIRTUAL DMA */ -#define DMA_CAP_HS_VIRTUAL BIT(7) /**< HS VIRTUAL DMA */ -#define DMA_CAP_HS BIT(8) /**< HS DMA */ -#define DMA_CAP_SW BIT(9) /**< SW DMA */ +#define SOF_DMA_CAP_HDA BIT(0) /**< HDA DMA */ +#define SOF_DMA_CAP_GP_LP BIT(1) /**< GP LP DMA */ +#define SOF_DMA_CAP_GP_HP BIT(2) /**< GP HP DMA */ +#define SOF_DMA_CAP_BT BIT(3) /**< BT DMA */ +#define SOF_DMA_CAP_SP BIT(4) /**< SP DMA */ +#define SOF_DMA_CAP_DMIC BIT(5) /**< ACP DMA DMIC > */ +#define SOF_DMA_CAP_SP_VIRTUAL BIT(6) /**< SP VIRTUAL DMA */ +#define SOF_DMA_CAP_HS_VIRTUAL BIT(7) /**< HS VIRTUAL DMA */ +#define SOF_DMA_CAP_HS BIT(8) /**< HS DMA */ +#define SOF_DMA_CAP_SW BIT(9) /**< SW DMA */ /* DMA dev type bitmasks used to define the type of DMA */ -#define DMA_DEV_HOST BIT(0) /**< connectable to host */ -#define DMA_DEV_HDA BIT(1) /**< connectable to HD/A link */ -#define DMA_DEV_SSP BIT(2) /**< connectable to SSP fifo */ -#define DMA_DEV_DMIC BIT(3) /**< connectable to DMIC fifo */ -#define DMA_DEV_SSI BIT(4) /**< connectable to SSI / SPI fifo */ -#define DMA_DEV_ALH BIT(5) /**< connectable to ALH link */ -#define DMA_DEV_SAI BIT(6) /**< connectable to SAI fifo */ -#define DMA_DEV_ESAI BIT(7) /**< connectable to ESAI fifo */ -#define DMA_DEV_BT BIT(8) /**< connectable to ACP BT I2S */ -#define DMA_DEV_SP BIT(9) /**< connectable to ACP SP I2S */ -#define DMA_DEV_AFE_MEMIF BIT(10) /**< connectable to AFE fifo */ -#define DMA_DEV_SP_VIRTUAL BIT(11) /**< connectable to ACP SP VIRTUAL I2S */ -#define DMA_DEV_HS_VIRTUAL BIT(12) /**< connectable to ACP HS VIRTUAL I2S */ -#define DMA_DEV_HS BIT(13) /**< connectable to ACP HS I2S */ -#define DMA_DEV_MICFIL BIT(14) /**< connectable to MICFIL fifo */ -#define DMA_DEV_SW BIT(15) /**< connectable to ACP SW */ +#define SOF_DMA_DEV_HOST BIT(0) /**< connectable to host */ +#define SOF_DMA_DEV_HDA BIT(1) /**< connectable to HD/A link */ +#define SOF_DMA_DEV_SSP BIT(2) /**< connectable to SSP fifo */ +#define SOF_DMA_DEV_DMIC BIT(3) /**< connectable to DMIC fifo */ +#define SOF_DMA_DEV_SSI BIT(4) /**< connectable to SSI / SPI fifo */ +#define SOF_DMA_DEV_ALH BIT(5) /**< connectable to ALH link */ +#define SOF_DMA_DEV_SAI BIT(6) /**< connectable to SAI fifo */ +#define SOF_DMA_DEV_ESAI BIT(7) /**< connectable to ESAI fifo */ +#define SOF_DMA_DEV_BT BIT(8) /**< connectable to ACP BT I2S */ +#define SOF_DMA_DEV_SP BIT(9) /**< connectable to ACP SP I2S */ +#define SOF_DMA_DEV_AFE_MEMIF BIT(10) /**< connectable to AFE fifo */ +#define SOF_DMA_DEV_SP_VIRTUAL BIT(11) /**< connectable to ACP SP VIRTUAL I2S */ +#define SOF_DMA_DEV_HS_VIRTUAL BIT(12) /**< connectable to ACP HS VIRTUAL I2S */ +#define SOF_DMA_DEV_HS BIT(13) /**< connectable to ACP HS I2S */ +#define SOF_DMA_DEV_MICFIL BIT(14) /**< connectable to MICFIL fifo */ +#define SOF_DMA_DEV_SW BIT(15) /**< connectable to ACP SW */ /* DMA access privilege flag */ -#define DMA_ACCESS_EXCLUSIVE 1 -#define DMA_ACCESS_SHARED 0 +#define SOF_DMA_ACCESS_EXCLUSIVE 1 +#define SOF_DMA_ACCESS_SHARED 0 /* DMA copy flags */ -#define DMA_COPY_BLOCKING BIT(0) -#define DMA_COPY_ONE_SHOT BIT(1) +#define SOF_DMA_COPY_BLOCKING BIT(0) +#define SOF_DMA_COPY_ONE_SHOT BIT(1) /* We will use this enum in cb handler to inform dma what * action we need to perform. */ -enum dma_cb_status { - DMA_CB_STATUS_RELOAD = 0, - DMA_CB_STATUS_END, +enum sof_dma_cb_status { + SOF_DMA_CB_STATUS_RELOAD = 0, + SOF_DMA_CB_STATUS_END, }; -#define DMA_CHAN_INVALID 0xFFFFFFFF -#define DMA_CORE_INVALID 0xFFFFFFFF +#define SOF_DMA_CHAN_INVALID 0xFFFFFFFF +#define SOF_DMA_CORE_INVALID 0xFFFFFFFF /* Attributes have been ported to Zephyr. This condition is necessary until full support of * CONFIG_SOF_ZEPHYR_STRICT_HEADERS. @@ -138,7 +138,7 @@ struct dma_sg_elem { struct dma_cb_data { struct dma_chan_data *channel; struct dma_sg_elem elem; - enum dma_cb_status status; + enum sof_dma_cb_status status; }; /** diff --git a/zephyr/lib/dma.c b/zephyr/lib/dma.c index 4d734026f322..41ef5c293371 100644 --- a/zephyr/lib/dma.c +++ b/zephyr/lib/dma.c @@ -24,11 +24,11 @@ SHARED_DATA struct dma dma[] = { #if DT_NODE_HAS_STATUS(DT_NODELABEL(lpgpdma0), okay) { /* Low Power GP DMAC 0 */ .plat_data = { - .dir = DMA_DIR_MEM_TO_MEM | DMA_DIR_MEM_TO_DEV | - DMA_DIR_DEV_TO_MEM | DMA_DIR_DEV_TO_DEV, - .caps = DMA_CAP_GP_LP, - .devs = DMA_DEV_SSP | DMA_DEV_DMIC | - DMA_DEV_ALH, + .dir = SOF_DMA_DIR_MEM_TO_MEM | SOF_DMA_DIR_MEM_TO_DEV | + SOF_DMA_DIR_DEV_TO_MEM | SOF_DMA_DIR_DEV_TO_DEV, + .caps = SOF_DMA_CAP_GP_LP, + .devs = SOF_DMA_DEV_SSP | SOF_DMA_DEV_DMIC | + SOF_DMA_DEV_ALH, .channels = 8, .period_count = DW_DMA_BUFFER_PERIOD_COUNT, }, @@ -38,11 +38,11 @@ SHARED_DATA struct dma dma[] = { #if DT_NODE_HAS_STATUS(DT_NODELABEL(lpgpdma1), okay) { /* Low Power GP DMAC 1 */ .plat_data = { - .dir = DMA_DIR_MEM_TO_MEM | DMA_DIR_MEM_TO_DEV | - DMA_DIR_DEV_TO_MEM | DMA_DIR_DEV_TO_DEV, - .caps = DMA_CAP_GP_LP, - .devs = DMA_DEV_SSP | DMA_DEV_DMIC | - DMA_DEV_ALH, + .dir = SOF_DMA_DIR_MEM_TO_MEM | SOF_DMA_DIR_MEM_TO_DEV | + SOF_DMA_DIR_DEV_TO_MEM | SOF_DMA_DIR_DEV_TO_DEV, + .caps = SOF_DMA_CAP_GP_LP, + .devs = SOF_DMA_DEV_SSP | SOF_DMA_DEV_DMIC | + SOF_DMA_DEV_ALH, .channels = 8, .period_count = DW_DMA_BUFFER_PERIOD_COUNT, }, @@ -52,9 +52,9 @@ SHARED_DATA struct dma dma[] = { #if DT_NODE_HAS_STATUS(DT_NODELABEL(hda_host_in), okay) { /* Host In DMAC */ .plat_data = { - .dir = DMA_DIR_LMEM_TO_HMEM, - .caps = DMA_CAP_HDA, - .devs = DMA_DEV_HOST, + .dir = SOF_DMA_DIR_LMEM_TO_HMEM, + .caps = SOF_DMA_CAP_HDA, + .devs = SOF_DMA_DEV_HOST, .channels = DT_PROP(DT_NODELABEL(hda_host_in), dma_channels), .period_count = HDA_DMA_BUFFER_PERIOD_COUNT, }, @@ -64,9 +64,9 @@ SHARED_DATA struct dma dma[] = { #if DT_NODE_HAS_STATUS(DT_NODELABEL(hda_host_out), okay) { /* Host out DMAC */ .plat_data = { - .dir = DMA_DIR_HMEM_TO_LMEM, - .caps = DMA_CAP_HDA, - .devs = DMA_DEV_HOST, + .dir = SOF_DMA_DIR_HMEM_TO_LMEM, + .caps = SOF_DMA_CAP_HDA, + .devs = SOF_DMA_DEV_HOST, .channels = DT_PROP(DT_NODELABEL(hda_host_out), dma_channels), .period_count = HDA_DMA_BUFFER_PERIOD_COUNT, }, @@ -76,13 +76,13 @@ SHARED_DATA struct dma dma[] = { #if DT_NODE_HAS_STATUS(DT_NODELABEL(hda_link_in), okay) { /* Link In DMAC */ .plat_data = { - .dir = DMA_DIR_DEV_TO_MEM, - .caps = DMA_CAP_HDA, + .dir = SOF_DMA_DIR_DEV_TO_MEM, + .caps = SOF_DMA_CAP_HDA, #if defined(CONFIG_SOC_INTEL_ACE20_LNL) || defined(CONFIG_SOC_INTEL_ACE30) - .devs = DMA_DEV_HDA | DMA_DEV_SSP | - DMA_DEV_DMIC | DMA_DEV_ALH, + .devs = SOF_DMA_DEV_HDA | SOF_DMA_DEV_SSP | + SOF_DMA_DEV_DMIC | SOF_DMA_DEV_ALH, #else - .devs = DMA_DEV_HDA, + .devs = SOF_DMA_DEV_HDA, #endif /* CONFIG_SOC_INTEL_ACE20_LNL || CONFIG_SOC_INTEL_ACE30 */ .channels = DT_PROP(DT_NODELABEL(hda_link_in), dma_channels), .period_count = HDA_DMA_BUFFER_PERIOD_COUNT, @@ -93,13 +93,13 @@ SHARED_DATA struct dma dma[] = { #if DT_NODE_HAS_STATUS(DT_NODELABEL(hda_link_out), okay) { /* Link out DMAC */ .plat_data = { - .dir = DMA_DIR_MEM_TO_DEV, - .caps = DMA_CAP_HDA, + .dir = SOF_DMA_DIR_MEM_TO_DEV, + .caps = SOF_DMA_CAP_HDA, #if defined(CONFIG_SOC_INTEL_ACE20_LNL) || defined(CONFIG_SOC_INTEL_ACE30) - .devs = DMA_DEV_HDA | DMA_DEV_SSP | - DMA_DEV_DMIC | DMA_DEV_ALH, + .devs = SOF_DMA_DEV_HDA | SOF_DMA_DEV_SSP | + SOF_DMA_DEV_DMIC | SOF_DMA_DEV_ALH, #else - .devs = DMA_DEV_HDA, + .devs = SOF_DMA_DEV_HDA, #endif /* CONFIG_SOC_INTEL_ACE20_LNL || CONFIG_SOC_INTEL_ACE30 */ .channels = DT_PROP(DT_NODELABEL(hda_link_out), dma_channels), .period_count = HDA_DMA_BUFFER_PERIOD_COUNT, @@ -110,8 +110,8 @@ SHARED_DATA struct dma dma[] = { #ifdef CONFIG_SOC_MIMX9352_A55 { .plat_data = { - .dir = DMA_DIR_MEM_TO_DEV | DMA_DIR_DEV_TO_MEM, - .devs = DMA_DEV_SAI, + .dir = SOF_DMA_DIR_MEM_TO_DEV | SOF_DMA_DIR_DEV_TO_MEM, + .devs = SOF_DMA_DEV_SAI, /* TODO: might be worth using `dma-channels` here * (needs to become a mandatory property) */ @@ -122,8 +122,8 @@ SHARED_DATA struct dma dma[] = { }, { .plat_data = { - .dir = DMA_DIR_HMEM_TO_LMEM | DMA_DIR_LMEM_TO_HMEM, - .devs = DMA_DEV_HOST, + .dir = SOF_DMA_DIR_HMEM_TO_LMEM | SOF_DMA_DIR_LMEM_TO_HMEM, + .devs = SOF_DMA_DEV_HOST, .channels = DT_PROP(DT_NODELABEL(host_dma), dma_channels), .period_count = 2, }, @@ -133,8 +133,8 @@ SHARED_DATA struct dma dma[] = { #if defined(CONFIG_SOC_MIMX8QM6_ADSP) || defined(CONFIG_SOC_MIMX8QX6_ADSP) { .plat_data = { - .dir = DMA_DIR_MEM_TO_DEV | DMA_DIR_DEV_TO_MEM, - .devs = DMA_DEV_SAI | DMA_DEV_ESAI, + .dir = SOF_DMA_DIR_MEM_TO_DEV | SOF_DMA_DIR_DEV_TO_MEM, + .devs = SOF_DMA_DEV_SAI | SOF_DMA_DEV_ESAI, .channels = 32, .period_count = 2, }, @@ -142,8 +142,8 @@ SHARED_DATA struct dma dma[] = { }, { .plat_data = { - .dir = DMA_DIR_HMEM_TO_LMEM | DMA_DIR_LMEM_TO_HMEM, - .devs = DMA_DEV_HOST, + .dir = SOF_DMA_DIR_HMEM_TO_LMEM | SOF_DMA_DIR_LMEM_TO_HMEM, + .devs = SOF_DMA_DEV_HOST, .channels = DT_PROP(DT_NODELABEL(host_dma), dma_channels), .period_count = 2, }, @@ -153,8 +153,8 @@ SHARED_DATA struct dma dma[] = { #ifdef CONFIG_SOC_MIMX8UD7_ADSP { .plat_data = { - .dir = DMA_DIR_MEM_TO_DEV | DMA_DIR_DEV_TO_MEM, - .devs = DMA_DEV_SAI, + .dir = SOF_DMA_DIR_MEM_TO_DEV | SOF_DMA_DIR_DEV_TO_MEM, + .devs = SOF_DMA_DEV_SAI, .channels = 32, .period_count = 2, }, @@ -162,8 +162,8 @@ SHARED_DATA struct dma dma[] = { }, { .plat_data = { - .dir = DMA_DIR_HMEM_TO_LMEM | DMA_DIR_LMEM_TO_HMEM, - .devs = DMA_DEV_HOST, + .dir = SOF_DMA_DIR_HMEM_TO_LMEM | SOF_DMA_DIR_LMEM_TO_HMEM, + .devs = SOF_DMA_DEV_HOST, .channels = DT_PROP(DT_NODELABEL(host_dma), dma_channels), .period_count = 2, }, @@ -173,8 +173,8 @@ SHARED_DATA struct dma dma[] = { #ifdef CONFIG_SOC_MIMX9596_M7 { .plat_data = { - .dir = DMA_DIR_MEM_TO_DEV | DMA_DIR_DEV_TO_MEM, - .devs = DMA_DEV_SAI, + .dir = SOF_DMA_DIR_MEM_TO_DEV | SOF_DMA_DIR_DEV_TO_MEM, + .devs = SOF_DMA_DEV_SAI, .channels = 64, .period_count = 2, }, @@ -182,8 +182,8 @@ SHARED_DATA struct dma dma[] = { }, { .plat_data = { - .dir = DMA_DIR_HMEM_TO_LMEM | DMA_DIR_LMEM_TO_HMEM, - .devs = DMA_DEV_HOST, + .dir = SOF_DMA_DIR_HMEM_TO_LMEM | SOF_DMA_DIR_LMEM_TO_HMEM, + .devs = SOF_DMA_DEV_HOST, .channels = DT_PROP(DT_NODELABEL(host_dma), dma_channels), .period_count = 2, },