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zephyr: sof/lib: split dma.h to dma.h and dma-legacy.h
Move parts of the dma.h interface only needed by XTOS drivers to a separate dma-legacy.h file. Use of non-native drivers is a transitory tool and used by a subset of targets. To make the code easier to read and maintain, the main dma.h should only require definitions needed when building SOF Zephyr with native Zephyr drivers (CONFIG_ZEPHYR_NATIVE_DRIVERS). This is especially important for DMA as there is lot of similarly named definitions and interfaces related to DMA in Zephyr and SOF. Signed-off-by: Kai Vehmanen <[email protected]>
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,286 @@ | ||
| /* SPDX-License-Identifier: BSD-3-Clause | ||
| * | ||
| * Copyright(c) 2024 Intel Corporation. | ||
| */ | ||
|
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| #ifndef __SOF_LIB_DMA_LEGACY_H__ | ||
| #define __SOF_LIB_DMA_LEGACY_H__ | ||
|
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| /* DMA attributes */ | ||
| #define DMA_ATTR_BUFFER_ALIGNMENT 0 | ||
| #define DMA_ATTR_COPY_ALIGNMENT 1 | ||
| #define DMA_ATTR_BUFFER_ADDRESS_ALIGNMENT 2 | ||
| #define DMA_ATTR_BUFFER_PERIOD_COUNT 3 | ||
|
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| /* DMA interrupt commands */ | ||
| enum dma_irq_cmd { | ||
| DMA_IRQ_STATUS_GET = 0, | ||
| DMA_IRQ_CLEAR, | ||
| DMA_IRQ_MASK, | ||
| DMA_IRQ_UNMASK | ||
| }; | ||
|
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| /* DMA operations */ | ||
| struct dma_ops { | ||
|
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| struct dma_chan_data *(*channel_get)(struct dma *dma, | ||
| unsigned int req_channel); | ||
| void (*channel_put)(struct dma_chan_data *channel); | ||
|
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| int (*start)(struct dma_chan_data *channel); | ||
| int (*stop)(struct dma_chan_data *channel); | ||
| int (*stop_delayed)(struct dma_chan_data *channel); | ||
| int (*copy)(struct dma_chan_data *channel, int bytes, uint32_t flags); | ||
| int (*pause)(struct dma_chan_data *channel); | ||
| int (*release)(struct dma_chan_data *channel); | ||
| int (*status)(struct dma_chan_data *channel, | ||
| struct dma_chan_status *status, uint8_t direction); | ||
|
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| int (*set_config)(struct dma_chan_data *channel, | ||
| struct dma_sg_config *config); | ||
|
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| int (*probe)(struct dma *dma); | ||
| int (*remove)(struct dma *dma); | ||
|
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| int (*get_data_size)(struct dma_chan_data *channel, uint32_t *avail, | ||
| uint32_t *free); | ||
|
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| int (*get_attribute)(struct dma *dma, uint32_t type, uint32_t *value); | ||
|
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| int (*interrupt)(struct dma_chan_data *channel, enum dma_irq_cmd cmd); | ||
| }; | ||
|
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| /* DMA API | ||
| * Programming flow is :- | ||
| * | ||
| * 1) dma_channel_get() | ||
| * 2) notifier_register() | ||
| * 3) dma_set_config() | ||
| * 4) dma_start() | ||
| * ... DMA now running ... | ||
| * 5) dma_stop() | ||
| * 6) dma_stop_delayed() | ||
| * 7) dma_channel_put() | ||
| */ | ||
|
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| static inline struct dma_chan_data *dma_channel_get_legacy(struct dma *dma, | ||
| int req_channel) | ||
| { | ||
| if (!dma || !dma->ops || !dma->ops->channel_get) | ||
| return NULL; | ||
|
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| struct dma_chan_data *chan = dma->ops->channel_get(dma, req_channel); | ||
|
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| return chan; | ||
| } | ||
|
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| static inline void dma_channel_put_legacy(struct dma_chan_data *channel) | ||
| { | ||
| channel->dma->ops->channel_put(channel); | ||
| } | ||
|
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| static inline int dma_start_legacy(struct dma_chan_data *channel) | ||
| { | ||
| return channel->dma->ops->start(channel); | ||
| } | ||
|
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| static inline int dma_stop_legacy(struct dma_chan_data *channel) | ||
| { | ||
| if (channel->dma->ops->stop) | ||
| return channel->dma->ops->stop(channel); | ||
|
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| return 0; | ||
| } | ||
|
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| static inline int dma_stop_delayed_legacy(struct dma_chan_data *channel) | ||
| { | ||
| if (channel->dma->ops->stop_delayed) | ||
| return channel->dma->ops->stop_delayed(channel); | ||
|
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| return 0; | ||
| } | ||
|
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| /** \defgroup sof_dma_copy_func static int dma_copy (struct dma_chan_data * channel, int bytes, uint32_t flags) | ||
| * | ||
| * This function is in a separate subgroup to solve a name clash with | ||
| * struct dma_copy {} | ||
| * @{ | ||
| */ | ||
| static inline int dma_copy_legacy(struct dma_chan_data *channel, int bytes, | ||
| uint32_t flags) | ||
| { | ||
| return channel->dma->ops->copy(channel, bytes, flags); | ||
| } | ||
| /** @} */ | ||
|
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| static inline int dma_pause_legacy(struct dma_chan_data *channel) | ||
| { | ||
| if (channel->dma->ops->pause) | ||
| return channel->dma->ops->pause(channel); | ||
|
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| return 0; | ||
| } | ||
|
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| static inline int dma_release_legacy(struct dma_chan_data *channel) | ||
| { | ||
| if (channel->dma->ops->release) | ||
| return channel->dma->ops->release(channel); | ||
|
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| return 0; | ||
| } | ||
|
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| static inline int dma_status_legacy(struct dma_chan_data *channel, | ||
| struct dma_chan_status *status, uint8_t direction) | ||
| { | ||
| return channel->dma->ops->status(channel, status, direction); | ||
| } | ||
|
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| static inline int dma_set_config_legacy(struct dma_chan_data *channel, | ||
| struct dma_sg_config *config) | ||
| { | ||
| return channel->dma->ops->set_config(channel, config); | ||
| } | ||
|
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| static inline int dma_probe_legacy(struct dma *dma) | ||
| { | ||
| return dma->ops->probe(dma); | ||
| } | ||
|
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| static inline int dma_remove_legacy(struct dma *dma) | ||
| { | ||
| return dma->ops->remove(dma); | ||
| } | ||
|
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| static inline int dma_get_data_size_legacy(struct dma_chan_data *channel, | ||
| uint32_t *avail, uint32_t *free) | ||
| { | ||
| return channel->dma->ops->get_data_size(channel, avail, free); | ||
| } | ||
|
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| static inline int dma_get_attribute_legacy(struct dma *dma, uint32_t type, | ||
| uint32_t *value) | ||
| { | ||
| return dma->ops->get_attribute(dma, type, value); | ||
| } | ||
|
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| static inline int dma_interrupt_legacy(struct dma_chan_data *channel, | ||
| enum dma_irq_cmd cmd) | ||
| { | ||
| return channel->dma->ops->interrupt(channel, cmd); | ||
| } | ||
|
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| #define dma_set_drvdata(dma, data) \ | ||
| (dma->priv_data = data) | ||
| #define dma_get_drvdata(dma) \ | ||
| dma->priv_data | ||
| #define dma_base(dma) \ | ||
| dma->plat_data.base | ||
| #define dma_irq(dma) \ | ||
| dma->plat_data.irq | ||
| #define dma_irq_name(dma) \ | ||
| dma->plat_data.irq_name | ||
| #define dma_chan_size(dma) \ | ||
| dma->plat_data.chan_size | ||
| #define dma_chan_base(dma, chan) \ | ||
| (dma->plat_data.base + chan * dma->plat_data.chan_size) | ||
| #define dma_chan_get_data(chan) \ | ||
| ((chan)->priv_data) | ||
| #define dma_chan_set_data(chan, data) \ | ||
| ((chan)->priv_data = data) | ||
|
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| /* DMA hardware register operations */ | ||
| static inline uint32_t dma_reg_read(struct dma *dma, uint32_t reg) | ||
| { | ||
| return io_reg_read(dma_base(dma) + reg); | ||
| } | ||
|
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| static inline uint16_t dma_reg_read16(struct dma *dma, uint32_t reg) | ||
| { | ||
| return io_reg_read16(dma_base(dma) + reg); | ||
| } | ||
|
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| static inline void dma_reg_write(struct dma *dma, uint32_t reg, uint32_t value) | ||
| { | ||
| io_reg_write(dma_base(dma) + reg, value); | ||
| } | ||
|
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| static inline void dma_reg_write16(struct dma *dma, uint32_t reg, | ||
| uint16_t value) | ||
| { | ||
| io_reg_write16(dma_base(dma) + reg, value); | ||
| } | ||
|
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| static inline void dma_reg_update_bits(struct dma *dma, uint32_t reg, | ||
| uint32_t mask, uint32_t value) | ||
| { | ||
| io_reg_update_bits(dma_base(dma) + reg, mask, value); | ||
| } | ||
|
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| static inline uint32_t dma_chan_reg_read(struct dma_chan_data *channel, | ||
| uint32_t reg) | ||
| { | ||
| return io_reg_read(dma_chan_base(channel->dma, channel->index) + reg); | ||
| } | ||
|
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| static inline uint16_t dma_chan_reg_read16(struct dma_chan_data *channel, | ||
| uint32_t reg) | ||
| { | ||
| return io_reg_read16(dma_chan_base(channel->dma, channel->index) + reg); | ||
| } | ||
|
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| static inline void dma_chan_reg_write(struct dma_chan_data *channel, | ||
| uint32_t reg, uint32_t value) | ||
| { | ||
| io_reg_write(dma_chan_base(channel->dma, channel->index) + reg, value); | ||
| } | ||
|
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| static inline void dma_chan_reg_write16(struct dma_chan_data *channel, | ||
| uint32_t reg, uint16_t value) | ||
| { | ||
| io_reg_write16(dma_chan_base(channel->dma, channel->index) + reg, | ||
| value); | ||
| } | ||
|
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| static inline void dma_chan_reg_update_bits(struct dma_chan_data *channel, | ||
| uint32_t reg, uint32_t mask, | ||
| uint32_t value) | ||
| { | ||
| io_reg_update_bits(dma_chan_base(channel->dma, channel->index) + reg, | ||
| mask, value); | ||
| } | ||
|
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| static inline void dma_chan_reg_update_bits16(struct dma_chan_data *channel, | ||
| uint32_t reg, uint16_t mask, | ||
| uint16_t value) | ||
| { | ||
| io_reg_update_bits16(dma_chan_base(channel->dma, channel->index) + reg, | ||
| mask, value); | ||
| } | ||
|
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| /* init dma copy context */ | ||
| int dma_copy_new(struct dma_copy *dc); | ||
|
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| /* free dma copy context resources */ | ||
| static inline void dma_copy_free(struct dma_copy *dc) | ||
| { | ||
| dma_channel_put_legacy(dc->chan); | ||
| } | ||
|
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| /* DMA copy data from host to DSP */ | ||
| int dma_copy_from_host(struct dma_copy *dc, struct dma_sg_config *host_sg, | ||
| int32_t host_offset, void *local_ptr, int32_t size); | ||
| int dma_copy_from_host_nowait(struct dma_copy *dc, | ||
| struct dma_sg_config *host_sg, | ||
| int32_t host_offset, void *local_ptr, | ||
| int32_t size); | ||
|
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| /* DMA copy data from DSP to host */ | ||
| int dma_copy_to_host(struct dma_copy *dc, struct dma_sg_config *host_sg, | ||
| int32_t host_offset, void *local_ptr, int32_t size); | ||
| int dma_copy_to_host_nowait(struct dma_copy *dc, struct dma_sg_config *host_sg, | ||
| int32_t host_offset, void *local_ptr, int32_t size); | ||
|
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| int dma_copy_set_stream_tag(struct dma_copy *dc, uint32_t stream_tag); | ||
|
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| #endif /* __SOF_LIB_DMA_LEGACY_H__ */ |
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