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regbits.elf.dmp
2050 lines (1880 loc) · 97.6 KB
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regbits.elf.dmp
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regbits.elf: file format elf64-x86-64
Disassembly of section .text:
00000000004006d0 <_start>:
4006d0: 31 ed xor %ebp,%ebp
4006d2: 49 89 d1 mov %rdx,%r9
4006d5: 5e pop %rsi
4006d6: 48 89 e2 mov %rsp,%rdx
4006d9: 48 83 e4 f0 and $0xfffffffffffffff0,%rsp
4006dd: 50 push %rax
4006de: 54 push %rsp
4006df: 49 c7 c0 20 24 40 00 mov $0x402420,%r8
4006e6: 48 c7 c1 b0 23 40 00 mov $0x4023b0,%rcx
4006ed: 48 c7 c7 26 23 40 00 mov $0x402326,%rdi
4006f4: ff 15 f6 38 20 00 callq *0x2038f6(%rip) # 603ff0 <__libc_start_main@GLIBC_2.2.5>
4006fa: f4 hlt
4006fb: 0f 1f 44 00 00 nopl 0x0(%rax,%rax,1)
0000000000400700 <deregister_tm_clones>:
400700: 55 push %rbp
400701: b8 60 40 60 00 mov $0x604060,%eax
400706: 48 3d 60 40 60 00 cmp $0x604060,%rax
40070c: 48 89 e5 mov %rsp,%rbp
40070f: 74 17 je 400728 <deregister_tm_clones+0x28>
400711: b8 00 00 00 00 mov $0x0,%eax
400716: 48 85 c0 test %rax,%rax
400719: 74 0d je 400728 <deregister_tm_clones+0x28>
40071b: 5d pop %rbp
40071c: bf 60 40 60 00 mov $0x604060,%edi
400721: ff e0 jmpq *%rax
400723: 0f 1f 44 00 00 nopl 0x0(%rax,%rax,1)
400728: 5d pop %rbp
400729: c3 retq
40072a: 66 0f 1f 44 00 00 nopw 0x0(%rax,%rax,1)
0000000000400730 <register_tm_clones>:
400730: be 60 40 60 00 mov $0x604060,%esi
400735: 55 push %rbp
400736: 48 81 ee 60 40 60 00 sub $0x604060,%rsi
40073d: 48 89 e5 mov %rsp,%rbp
400740: 48 c1 fe 03 sar $0x3,%rsi
400744: 48 89 f0 mov %rsi,%rax
400747: 48 c1 e8 3f shr $0x3f,%rax
40074b: 48 01 c6 add %rax,%rsi
40074e: 48 d1 fe sar %rsi
400751: 74 15 je 400768 <register_tm_clones+0x38>
400753: b8 00 00 00 00 mov $0x0,%eax
400758: 48 85 c0 test %rax,%rax
40075b: 74 0b je 400768 <register_tm_clones+0x38>
40075d: 5d pop %rbp
40075e: bf 60 40 60 00 mov $0x604060,%edi
400763: ff e0 jmpq *%rax
400765: 0f 1f 00 nopl (%rax)
400768: 5d pop %rbp
400769: c3 retq
40076a: 66 0f 1f 44 00 00 nopw 0x0(%rax,%rax,1)
0000000000400770 <__do_global_dtors_aux>:
400770: 80 3d f1 38 20 00 00 cmpb $0x0,0x2038f1(%rip) # 604068 <completed.6998>
400777: 75 17 jne 400790 <__do_global_dtors_aux+0x20>
400779: 55 push %rbp
40077a: 48 89 e5 mov %rsp,%rbp
40077d: e8 7e ff ff ff callq 400700 <deregister_tm_clones>
400782: c6 05 df 38 20 00 01 movb $0x1,0x2038df(%rip) # 604068 <completed.6998>
400789: 5d pop %rbp
40078a: c3 retq
40078b: 0f 1f 44 00 00 nopl 0x0(%rax,%rax,1)
400790: f3 c3 repz retq
400792: 66 66 2e 0f 1f 84 00 data16 nopw %cs:0x0(%rax,%rax,1)
400799: 00 00 00 00
40079d: 0f 1f 00 nopl (%rax)
00000000004007a0 <frame_dummy>:
4007a0: 55 push %rbp
4007a1: 48 89 e5 mov %rsp,%rbp
4007a4: 5d pop %rbp
4007a5: eb 89 jmp 400730 <register_tm_clones>
00000000004007a7 <zero_reg()>:
4007a7: c7 04 25 c4 02 70 00 movl $0x0,0x7002c4
4007ae: 00 00 00 00
4007b2: c3 retq
00000000004007b3 <zero_array()>:
4007b3: c7 04 25 2c 01 70 00 movl $0x0,0x70012c
4007ba: 00 00 00 00
4007be: c3 retq
00000000004007bf <set_singl_bits_operator()>:
4007bf: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
4007c6: 83 c8 40 or $0x40,%eax
4007c9: 89 04 25 c4 02 70 00 mov %eax,0x7002c4
4007d0: c3 retq
00000000004007d1 <set_singl_bits_method()>:
4007d1: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
4007d8: 83 c8 40 or $0x40,%eax
4007db: 89 04 25 c4 02 70 00 mov %eax,0x7002c4
4007e2: c3 retq
00000000004007e3 <clr_singl_bits_operator()>:
4007e3: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
4007ea: 83 e0 bf and $0xffffffbf,%eax
4007ed: 89 04 25 c4 02 70 00 mov %eax,0x7002c4
4007f4: c3 retq
00000000004007f5 <clr_singl_bits_method()>:
4007f5: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
4007fc: 83 e0 bf and $0xffffffbf,%eax
4007ff: 89 04 25 c4 02 70 00 mov %eax,0x7002c4
400806: c3 retq
0000000000400807 <set_singl_mskd_operator()>:
400807: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
40080e: 83 c8 02 or $0x2,%eax
400811: 89 04 25 c4 02 70 00 mov %eax,0x7002c4
400818: c3 retq
0000000000400819 <set_singl_mskd_method()>:
400819: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
400820: 83 c8 02 or $0x2,%eax
400823: 89 04 25 c4 02 70 00 mov %eax,0x7002c4
40082a: c3 retq
000000000040082b <clr_singl_mskd_operator()>:
40082b: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
400832: 83 e0 fd and $0xfffffffd,%eax
400835: 89 04 25 c4 02 70 00 mov %eax,0x7002c4
40083c: c3 retq
000000000040083d <clr_singl_mskd_method()>:
40083d: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
400844: 83 e0 fd and $0xfffffffd,%eax
400847: 89 04 25 c4 02 70 00 mov %eax,0x7002c4
40084e: c3 retq
000000000040084f <equ_singl_bits_operator()>:
40084f: c7 04 25 c4 02 70 00 movl $0x40,0x7002c4
400856: 40 00 00 00
40085a: c3 retq
000000000040085b <equ_singl_bits_method()>:
40085b: c7 04 25 c4 02 70 00 movl $0x40,0x7002c4
400862: 40 00 00 00
400866: c3 retq
0000000000400867 <equ_singl_mskd_operator()>:
400867: c7 04 25 c4 02 70 00 movl $0x2,0x7002c4
40086e: 02 00 00 00
400872: c3 retq
0000000000400873 <equ_singl_mskd_method()>:
400873: c7 04 25 c4 02 70 00 movl $0x2,0x7002c4
40087a: 02 00 00 00
40087e: c3 retq
000000000040087f <flp_singl_bits_operator()>:
40087f: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
400886: 83 f0 40 xor $0x40,%eax
400889: 89 04 25 c4 02 70 00 mov %eax,0x7002c4
400890: c3 retq
0000000000400891 <flp_singl_bits_method()>:
400891: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
400898: 83 f0 40 xor $0x40,%eax
40089b: 89 04 25 c4 02 70 00 mov %eax,0x7002c4
4008a2: c3 retq
00000000004008a3 <flp_singl_mskd_operator()>:
4008a3: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
4008aa: 83 f0 02 xor $0x2,%eax
4008ad: 89 04 25 c4 02 70 00 mov %eax,0x7002c4
4008b4: c3 retq
00000000004008b5 <flp_singl_mskd_method()>:
4008b5: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
4008bc: 83 f0 02 xor $0x2,%eax
4008bf: 89 04 25 c4 02 70 00 mov %eax,0x7002c4
4008c6: c3 retq
00000000004008c7 <ins_singl_mskd_operator()>:
4008c7: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
4008ce: 83 e0 f9 and $0xfffffff9,%eax
4008d1: 83 c8 04 or $0x4,%eax
4008d4: 89 04 25 c4 02 70 00 mov %eax,0x7002c4
4008db: c3 retq
00000000004008dc <ins_singl_mskd_method()>:
4008dc: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
4008e3: 83 e0 f9 and $0xfffffff9,%eax
4008e6: 83 c8 04 or $0x4,%eax
4008e9: 89 04 25 c4 02 70 00 mov %eax,0x7002c4
4008f0: c3 retq
00000000004008f1 <set_multi_bits_operator()>:
4008f1: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
4008f8: 83 c8 21 or $0x21,%eax
4008fb: 89 04 25 c4 02 70 00 mov %eax,0x7002c4
400902: c3 retq
0000000000400903 <set_multi_bits_method()>:
400903: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
40090a: 83 c8 21 or $0x21,%eax
40090d: 89 04 25 c4 02 70 00 mov %eax,0x7002c4
400914: c3 retq
0000000000400915 <ins_multi_mskd_operator()>:
400915: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
40091c: 25 79 f0 ff ff and $0xfffff079,%eax
400921: 0d 82 01 00 00 or $0x182,%eax
400926: 89 04 25 c4 02 70 00 mov %eax,0x7002c4
40092d: c3 retq
000000000040092e <ins_multi_mskd_method()>:
40092e: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
400935: 25 79 f0 ff ff and $0xfffff079,%eax
40093a: 0d 82 01 00 00 or $0x182,%eax
40093f: 89 04 25 c4 02 70 00 mov %eax,0x7002c4
400946: c3 retq
0000000000400947 <equ_multi_bits_operator()>:
400947: c7 04 25 c4 02 70 00 movl $0x60,0x7002c4
40094e: 60 00 00 00
400952: c3 retq
0000000000400953 <equ_multi_bits_method()>:
400953: c7 04 25 c4 02 70 00 movl $0x60,0x7002c4
40095a: 60 00 00 00
40095e: c3 retq
000000000040095f <equ_multi_mskd_operator()>:
40095f: c7 04 25 c4 02 70 00 movl $0x308,0x7002c4
400966: 08 03 00 00
40096a: c3 retq
000000000040096b <equ_multi_mskd_method()>:
40096b: c7 04 25 c4 02 70 00 movl $0x308,0x7002c4
400972: 08 03 00 00
400976: c3 retq
0000000000400977 <equ_bits_mskd_operator()>:
400977: c7 04 25 c4 02 70 00 movl $0x22,0x7002c4
40097e: 22 00 00 00
400982: c3 retq
0000000000400983 <equ_bits_mskd_method()>:
400983: c7 04 25 c4 02 70 00 movl $0x22,0x7002c4
40098a: 22 00 00 00
40098e: c3 retq
000000000040098f <equ_mskd_bits_operator()>:
40098f: c7 04 25 c4 02 70 00 movl $0x44,0x7002c4
400996: 44 00 00 00
40099a: c3 retq
000000000040099b <equ_mskd_bits_method()>:
40099b: c7 04 25 c4 02 70 00 movl $0x44,0x7002c4
4009a2: 44 00 00 00
4009a6: c3 retq
00000000004009a7 <equ_bits_var()>:
4009a7: c7 04 25 c4 02 70 00 movl $0x40,0x7002c4
4009ae: 40 00 00 00
4009b2: c7 04 25 c4 02 70 00 movl $0x1,0x7002c4
4009b9: 01 00 00 00
4009bd: c3 retq
00000000004009be <equ_mskd_var()>:
4009be: c7 04 25 c4 02 70 00 movl $0x2,0x7002c4
4009c5: 02 00 00 00
4009c9: c7 04 25 c4 02 70 00 movl $0x180,0x7002c4
4009d0: 80 01 00 00
4009d4: c3 retq
00000000004009d5 <cmp_equ_zero()>:
4009d5: c7 04 25 c4 02 70 00 movl $0x0,0x7002c4
4009dc: 00 00 00 00
4009e0: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
4009e7: 85 c0 test %eax,%eax
4009e9: 74 0c je 4009f7 <cmp_equ_zero()+0x22>
4009eb: c7 04 25 24 02 70 00 movl $0x22000000,0x700224
4009f2: 00 00 00 22
4009f6: c3 retq
4009f7: c7 04 25 24 02 70 00 movl $0x3a000000,0x700224
4009fe: 00 00 00 3a
400a02: c3 retq
0000000000400a03 <cmp_neq_zero()>:
400a03: c7 04 25 c4 02 70 00 movl $0x0,0x7002c4
400a0a: 00 00 00 00
400a0e: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
400a15: 85 c0 test %eax,%eax
400a17: 75 0c jne 400a25 <cmp_neq_zero()+0x22>
400a19: c7 04 25 c4 02 70 00 movl $0x20,0x7002c4
400a20: 20 00 00 00
400a24: c3 retq
400a25: c7 04 25 c4 02 70 00 movl $0x4,0x7002c4
400a2c: 04 00 00 00
400a30: c3 retq
0000000000400a31 <cmp_equ_bits()>:
400a31: c7 04 25 c4 02 70 00 movl $0x40,0x7002c4
400a38: 40 00 00 00
400a3c: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
400a43: a8 40 test $0x40,%al
400a45: 75 0c jne 400a53 <cmp_equ_bits()+0x22>
400a47: c7 04 25 24 02 70 00 movl $0x1a000000,0x700224
400a4e: 00 00 00 1a
400a52: c3 retq
400a53: c7 04 25 24 02 70 00 movl $0x16000000,0x700224
400a5a: 00 00 00 16
400a5e: c3 retq
0000000000400a5f <cmp_neq_bits()>:
400a5f: c7 04 25 c4 02 70 00 movl $0x40,0x7002c4
400a66: 40 00 00 00
400a6a: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
400a71: a8 40 test $0x40,%al
400a73: 75 0c jne 400a81 <cmp_neq_bits()+0x22>
400a75: c7 04 25 c4 02 70 00 movl $0x2,0x7002c4
400a7c: 02 00 00 00
400a80: c3 retq
400a81: c7 04 25 c4 02 70 00 movl $0x20,0x7002c4
400a88: 20 00 00 00
400a8c: c3 retq
0000000000400a8d <cmp_equ_multi_bits()>:
400a8d: c7 04 25 c4 02 70 00 movl $0x60,0x7002c4
400a94: 60 00 00 00
400a98: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
400a9f: 83 e0 60 and $0x60,%eax
400aa2: 83 f8 60 cmp $0x60,%eax
400aa5: 74 0c je 400ab3 <cmp_equ_multi_bits()+0x26>
400aa7: c7 04 25 24 02 70 00 movl $0x2e000000,0x700224
400aae: 00 00 00 2e
400ab2: c3 retq
400ab3: c7 04 25 24 02 70 00 movl $0x22000000,0x700224
400aba: 00 00 00 22
400abe: c3 retq
0000000000400abf <cmp_neq_multi_bits()>:
400abf: c7 04 25 c4 02 70 00 movl $0x60,0x7002c4
400ac6: 60 00 00 00
400aca: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
400ad1: 83 e0 60 and $0x60,%eax
400ad4: 83 f8 60 cmp $0x60,%eax
400ad7: 74 0c je 400ae5 <cmp_neq_multi_bits()+0x26>
400ad9: c7 04 25 24 02 70 00 movl $0x3a000000,0x700224
400ae0: 00 00 00 3a
400ae4: c3 retq
400ae5: c7 04 25 24 02 70 00 movl $0x3e000000,0x700224
400aec: 00 00 00 3e
400af0: c3 retq
0000000000400af1 <cmp_equ_mskd()>:
400af1: c7 04 25 c4 02 70 00 movl $0x1d000,0x7002c4
400af8: 00 d0 01 00
400afc: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
400b03: 25 00 f0 01 00 and $0x1f000,%eax
400b08: 3d 00 10 01 00 cmp $0x11000,%eax
400b0d: 74 19 je 400b28 <cmp_equ_mskd()+0x37>
400b0f: 8b 04 25 24 02 70 00 mov 0x700224,%eax
400b16: 25 ff ff ff c1 and $0xc1ffffff,%eax
400b1b: 0d 00 00 00 22 or $0x22000000,%eax
400b20: 89 04 25 24 02 70 00 mov %eax,0x700224
400b27: c3 retq
400b28: 8b 04 25 24 02 70 00 mov 0x700224,%eax
400b2f: 25 ff ff ff c1 and $0xc1ffffff,%eax
400b34: 0d 00 00 00 0e or $0xe000000,%eax
400b39: 89 04 25 24 02 70 00 mov %eax,0x700224
400b40: c3 retq
0000000000400b41 <cmp_neq_mskd()>:
400b41: c7 04 25 c4 02 70 00 movl $0x1d000,0x7002c4
400b48: 00 d0 01 00
400b4c: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
400b53: 25 00 f0 01 00 and $0x1f000,%eax
400b58: 3d 00 10 01 00 cmp $0x11000,%eax
400b5d: 74 15 je 400b74 <cmp_neq_mskd()+0x33>
400b5f: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
400b66: 83 e0 f9 and $0xfffffff9,%eax
400b69: 83 c8 04 or $0x4,%eax
400b6c: 89 04 25 c4 02 70 00 mov %eax,0x7002c4
400b73: c3 retq
400b74: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
400b7b: 83 c8 40 or $0x40,%eax
400b7e: 89 04 25 c4 02 70 00 mov %eax,0x7002c4
400b85: c3 retq
0000000000400b86 <cmp_equ_reg()>:
400b86: c7 04 25 c4 02 70 00 movl $0x22,0x7002c4
400b8d: 22 00 00 00
400b91: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
400b98: 83 f8 22 cmp $0x22,%eax
400b9b: 74 0c je 400ba9 <cmp_equ_reg()+0x23>
400b9d: c7 04 25 24 02 70 00 movl $0x2e000000,0x700224
400ba4: 00 00 00 2e
400ba8: c3 retq
400ba9: c7 04 25 24 02 70 00 movl $0x2a000000,0x700224
400bb0: 00 00 00 2a
400bb4: c3 retq
0000000000400bb5 <cmp_neq_reg()>:
400bb5: c7 04 25 c4 02 70 00 movl $0x22,0x7002c4
400bbc: 22 00 00 00
400bc0: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
400bc7: 83 f8 22 cmp $0x22,%eax
400bca: 74 0c je 400bd8 <cmp_neq_reg()+0x23>
400bcc: c7 04 25 c4 02 70 00 movl $0x2,0x7002c4
400bd3: 02 00 00 00
400bd7: c3 retq
400bd8: c7 04 25 c4 02 70 00 movl $0x20,0x7002c4
400bdf: 20 00 00 00
400be3: c3 retq
0000000000400be4 <constexpr_bits_array()>:
400be4: c7 04 25 2c 01 70 00 movl $0x6,0x70012c
400beb: 06 00 00 00
400bef: c7 04 25 a0 01 70 00 movl $0x2000,0x7001a0
400bf6: 00 20 00 00
400bfa: c3 retq
0000000000400bfb <runtime_bits_array()>:
400bfb: c7 44 24 fc 03 00 00 movl $0x3,-0x4(%rsp)
400c02: 00
400c03: 8b 44 24 fc mov -0x4(%rsp),%eax
400c07: 89 c0 mov %eax,%eax
400c09: c7 04 85 20 01 70 00 movl $0x21,0x700120(,%rax,4)
400c10: 21 00 00 00
400c14: c3 retq
0000000000400c15 <prescaler_low()>:
400c15: c7 04 25 24 02 70 00 movl $0x77,0x700224
400c1c: 77 00 00 00
400c20: 8b 04 25 24 02 70 00 mov 0x700224,%eax
400c27: 83 e0 7f and $0x7f,%eax
400c2a: 89 04 25 2c 01 70 00 mov %eax,0x70012c
400c31: c3 retq
0000000000400c32 <prescaler_high()>:
400c32: c7 04 25 24 02 70 00 movl $0x3a000000,0x700224
400c39: 00 00 00 3a
400c3d: 8b 04 25 24 02 70 00 mov 0x700224,%eax
400c44: c1 e8 19 shr $0x19,%eax
400c47: 83 e0 1f and $0x1f,%eax
400c4a: 89 04 25 2c 01 70 00 mov %eax,0x70012c
400c51: c3 retq
0000000000400c52 <reg_mskd_lss()>:
400c52: c7 04 25 24 02 70 00 movl $0x36000000,0x700224
400c59: 00 00 00 36
400c5d: 8b 04 25 24 02 70 00 mov 0x700224,%eax
400c64: 25 00 00 00 3e and $0x3e000000,%eax
400c69: 3d ff ff ff 37 cmp $0x37ffffff,%eax
400c6e: 76 0c jbe 400c7c <reg_mskd_lss()+0x2a>
400c70: c7 04 25 c4 02 70 00 movl $0x4,0x7002c4
400c77: 04 00 00 00
400c7b: c3 retq
400c7c: c7 04 25 c4 02 70 00 movl $0x2,0x7002c4
400c83: 02 00 00 00
400c87: c3 retq
0000000000400c88 <reg_mskd_leq()>:
400c88: c7 04 25 24 02 70 00 movl $0x2e000000,0x700224
400c8f: 00 00 00 2e
400c93: 8b 04 25 24 02 70 00 mov 0x700224,%eax
400c9a: 25 00 00 00 3e and $0x3e000000,%eax
400c9f: 3d 00 00 00 2e cmp $0x2e000000,%eax
400ca4: 77 13 ja 400cb9 <reg_mskd_leq()+0x31>
400ca6: 8b 04 25 24 02 70 00 mov 0x700224,%eax
400cad: 25 00 00 00 3e and $0x3e000000,%eax
400cb2: 3d 00 00 00 30 cmp $0x30000000,%eax
400cb7: 76 0c jbe 400cc5 <reg_mskd_leq()+0x3d>
400cb9: c7 04 25 c4 02 70 00 movl $0x4,0x7002c4
400cc0: 04 00 00 00
400cc4: c3 retq
400cc5: c7 04 25 c4 02 70 00 movl $0x2,0x7002c4
400ccc: 02 00 00 00
400cd0: c3 retq
0000000000400cd1 <reg_mskd_gtr()>:
400cd1: c7 04 25 24 02 70 00 movl $0x26000000,0x700224
400cd8: 00 00 00 26
400cdc: 8b 04 25 24 02 70 00 mov 0x700224,%eax
400ce3: 25 00 00 00 3e and $0x3e000000,%eax
400ce8: 3d 00 00 00 24 cmp $0x24000000,%eax
400ced: 77 0c ja 400cfb <reg_mskd_gtr()+0x2a>
400cef: c7 04 25 c4 02 70 00 movl $0x4,0x7002c4
400cf6: 04 00 00 00
400cfa: c3 retq
400cfb: c7 04 25 c4 02 70 00 movl $0x2,0x7002c4
400d02: 02 00 00 00
400d06: c3 retq
0000000000400d07 <reg_mskd_geq()>:
400d07: c7 04 25 24 02 70 00 movl $0x22000000,0x700224
400d0e: 00 00 00 22
400d12: 8b 04 25 24 02 70 00 mov 0x700224,%eax
400d19: 25 00 00 00 3e and $0x3e000000,%eax
400d1e: 3d ff ff ff 1f cmp $0x1fffffff,%eax
400d23: 76 13 jbe 400d38 <reg_mskd_geq()+0x31>
400d25: 8b 04 25 24 02 70 00 mov 0x700224,%eax
400d2c: 25 00 00 00 3e and $0x3e000000,%eax
400d31: 3d ff ff ff 21 cmp $0x21ffffff,%eax
400d36: 77 0c ja 400d44 <reg_mskd_geq()+0x3d>
400d38: c7 04 25 c4 02 70 00 movl $0x4,0x7002c4
400d3f: 04 00 00 00
400d43: c3 retq
400d44: c7 04 25 c4 02 70 00 movl $0x2,0x7002c4
400d4b: 02 00 00 00
400d4f: c3 retq
0000000000400d50 <pos_cmp_eq()>:
400d50: c7 04 25 c4 02 70 00 movl $0x2,0x7002c4
400d57: 02 00 00 00
400d5b: c3 retq
0000000000400d5c <pos_cmp_ne()>:
400d5c: c7 04 25 c4 02 70 00 movl $0x2,0x7002c4
400d63: 02 00 00 00
400d67: c3 retq
0000000000400d68 <bits_extract_eq()>:
400d68: c7 04 25 c4 02 70 00 movl $0x40,0x7002c4
400d6f: 40 00 00 00
400d73: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
400d7a: 83 f8 40 cmp $0x40,%eax
400d7d: 74 0c je 400d8b <bits_extract_eq()+0x23>
400d7f: c7 04 25 c4 02 70 00 movl $0x4,0x7002c4
400d86: 04 00 00 00
400d8a: c3 retq
400d8b: c7 04 25 c4 02 70 00 movl $0x2,0x7002c4
400d92: 02 00 00 00
400d96: c3 retq
0000000000400d97 <mskd_extract_eq()>:
400d97: c7 04 25 c4 02 70 00 movl $0x2,0x7002c4
400d9e: 02 00 00 00
400da2: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
400da9: 83 f8 02 cmp $0x2,%eax
400dac: 74 0c je 400dba <mskd_extract_eq()+0x23>
400dae: c7 04 25 c4 02 70 00 movl $0x40,0x7002c4
400db5: 40 00 00 00
400db9: c3 retq
400dba: c7 04 25 c4 02 70 00 movl $0x20,0x7002c4
400dc1: 20 00 00 00
400dc5: c3 retq
0000000000400dc6 <mskd_extract_ne()>:
400dc6: c7 04 25 c4 02 70 00 movl $0x4,0x7002c4
400dcd: 04 00 00 00
400dd1: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
400dd8: 83 f8 04 cmp $0x4,%eax
400ddb: 74 0c je 400de9 <mskd_extract_ne()+0x23>
400ddd: c7 04 25 c4 02 70 00 movl $0x20,0x7002c4
400de4: 20 00 00 00
400de8: c3 retq
400de9: c7 04 25 c4 02 70 00 movl $0x40,0x7002c4
400df0: 40 00 00 00
400df4: c3 retq
0000000000400df5 <mskd_extract_lss()>:
400df5: c7 04 25 24 02 70 00 movl $0x16000000,0x700224
400dfc: 00 00 00 16
400e00: 8b 04 25 24 02 70 00 mov 0x700224,%eax
400e07: 3d ff ff ff 17 cmp $0x17ffffff,%eax
400e0c: 76 0c jbe 400e1a <mskd_extract_lss()+0x25>
400e0e: c7 04 25 c4 02 70 00 movl $0x40,0x7002c4
400e15: 40 00 00 00
400e19: c3 retq
400e1a: c7 04 25 c4 02 70 00 movl $0x20,0x7002c4
400e21: 20 00 00 00
400e25: c3 retq
0000000000400e26 <mskd_extract_leq()>:
400e26: c7 04 25 24 02 70 00 movl $0x2e000000,0x700224
400e2d: 00 00 00 2e
400e31: 8b 04 25 24 02 70 00 mov 0x700224,%eax
400e38: 3d 00 00 00 2e cmp $0x2e000000,%eax
400e3d: 76 0c jbe 400e4b <mskd_extract_leq()+0x25>
400e3f: c7 04 25 c4 02 70 00 movl $0x40,0x7002c4
400e46: 40 00 00 00
400e4a: c3 retq
400e4b: c7 04 25 c4 02 70 00 movl $0x20,0x7002c4
400e52: 20 00 00 00
400e56: c3 retq
0000000000400e57 <mskd_extract_gtr()>:
400e57: c7 04 25 24 02 70 00 movl $0x26000000,0x700224
400e5e: 00 00 00 26
400e62: 8b 04 25 24 02 70 00 mov 0x700224,%eax
400e69: 3d 00 00 00 24 cmp $0x24000000,%eax
400e6e: 77 0c ja 400e7c <mskd_extract_gtr()+0x25>
400e70: c7 04 25 c4 02 70 00 movl $0x40,0x7002c4
400e77: 40 00 00 00
400e7b: c3 retq
400e7c: c7 04 25 c4 02 70 00 movl $0x20,0x7002c4
400e83: 20 00 00 00
400e87: c3 retq
0000000000400e88 <set_bits_global()>:
400e88: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
400e8f: 83 c8 40 or $0x40,%eax
400e92: 89 04 25 c4 02 70 00 mov %eax,0x7002c4
400e99: c3 retq
0000000000400e9a <ins_mskd_global()>:
400e9a: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
400ea1: 83 e0 f9 and $0xfffffff9,%eax
400ea4: 83 c8 02 or $0x2,%eax
400ea7: 89 04 25 c4 02 70 00 mov %eax,0x7002c4
400eae: c3 retq
0000000000400eaf <assign_array_global()>:
400eaf: c7 04 25 2c 01 70 00 movl $0xbd,0x70012c
400eb6: bd 00 00 00
400eba: c3 retq
0000000000400ebb <shifted_global()>:
400ebb: c7 04 25 24 02 70 00 movl $0x2e000000,0x700224
400ec2: 00 00 00 2e
400ec6: 8b 04 25 24 02 70 00 mov 0x700224,%eax
400ecd: c1 e8 19 shr $0x19,%eax
400ed0: 83 e0 1f and $0x1f,%eax
400ed3: 89 04 25 2c 01 70 00 mov %eax,0x70012c
400eda: c3 retq
0000000000400edb <assign_register_global()>:
400edb: c7 04 25 c4 02 70 00 movl $0x4,0x7002c4
400ee2: 04 00 00 00
400ee6: c3 retq
0000000000400ee7 <copy_bits_equ()>:
400ee7: c7 04 25 c4 02 70 00 movl $0x40,0x7002c4
400eee: 40 00 00 00
400ef2: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
400ef9: a8 40 test $0x40,%al
400efb: 75 0c jne 400f09 <copy_bits_equ()+0x22>
400efd: c7 04 25 c4 02 70 00 movl $0x4,0x7002c4
400f04: 04 00 00 00
400f08: c3 retq
400f09: c7 04 25 c4 02 70 00 movl $0x2,0x7002c4
400f10: 02 00 00 00
400f14: c3 retq
0000000000400f15 <copy_bits_neq()>:
400f15: c7 04 25 c4 02 70 00 movl $0x40,0x7002c4
400f1c: 40 00 00 00
400f20: 8b 04 25 c4 02 70 00 mov 0x7002c4,%eax
400f27: a8 40 test $0x40,%al
400f29: 74 0c je 400f37 <copy_bits_neq()+0x22>
400f2b: c7 04 25 c4 02 70 00 movl $0x4,0x7002c4
400f32: 04 00 00 00
400f36: c3 retq
400f37: c7 04 25 c4 02 70 00 movl $0x2,0x7002c4
400f3e: 02 00 00 00
400f42: c3 retq
0000000000400f43 <copy_mskd_equ()>:
400f43: c7 04 25 24 02 70 00 movl $0x16000000,0x700224
400f4a: 00 00 00 16
400f4e: 8b 04 25 24 02 70 00 mov 0x700224,%eax
400f55: 25 00 00 00 3e and $0x3e000000,%eax
400f5a: 3d 00 00 00 16 cmp $0x16000000,%eax
400f5f: 74 0c je 400f6d <copy_mskd_equ()+0x2a>
400f61: c7 04 25 c4 02 70 00 movl $0x4,0x7002c4
400f68: 04 00 00 00
400f6c: c3 retq
400f6d: c7 04 25 c4 02 70 00 movl $0x2,0x7002c4
400f74: 02 00 00 00
400f78: c3 retq
0000000000400f79 <copy_mskd_neq()>:
400f79: c7 04 25 24 02 70 00 movl $0x1a000000,0x700224
400f80: 00 00 00 1a
400f84: 8b 04 25 24 02 70 00 mov 0x700224,%eax
400f8b: 25 00 00 00 3e and $0x3e000000,%eax
400f90: 3d 00 00 00 1a cmp $0x1a000000,%eax
400f95: 74 0c je 400fa3 <copy_mskd_neq()+0x2a>
400f97: c7 04 25 c4 02 70 00 movl $0x2,0x7002c4
400f9e: 02 00 00 00
400fa2: c3 retq
400fa3: c7 04 25 c4 02 70 00 movl $0x4,0x7002c4
400faa: 04 00 00 00
400fae: c3 retq
0000000000400faf <copy_mskd_lss()>:
400faf: c7 04 25 24 02 70 00 movl $0x36000000,0x700224
400fb6: 00 00 00 36
400fba: 8b 04 25 24 02 70 00 mov 0x700224,%eax
400fc1: 25 00 00 00 3e and $0x3e000000,%eax
400fc6: 3d ff ff ff 37 cmp $0x37ffffff,%eax
400fcb: 76 0c jbe 400fd9 <copy_mskd_lss()+0x2a>
400fcd: c7 04 25 c4 02 70 00 movl $0x4,0x7002c4
400fd4: 04 00 00 00
400fd8: c3 retq
400fd9: c7 04 25 c4 02 70 00 movl $0x2,0x7002c4
400fe0: 02 00 00 00
400fe4: c3 retq
0000000000400fe5 <copy_mskd_leq()>:
400fe5: c7 04 25 24 02 70 00 movl $0x2e000000,0x700224
400fec: 00 00 00 2e
400ff0: 8b 04 25 24 02 70 00 mov 0x700224,%eax
400ff7: 25 00 00 00 3e and $0x3e000000,%eax
400ffc: 3d 00 00 00 2e cmp $0x2e000000,%eax
401001: 76 0c jbe 40100f <copy_mskd_leq()+0x2a>
401003: c7 04 25 c4 02 70 00 movl $0x4,0x7002c4
40100a: 04 00 00 00
40100e: c3 retq
40100f: c7 04 25 c4 02 70 00 movl $0x2,0x7002c4
401016: 02 00 00 00
40101a: c3 retq
000000000040101b <copy_mskd_gtr()>:
40101b: c7 04 25 24 02 70 00 movl $0x26000000,0x700224
401022: 00 00 00 26
401026: 8b 04 25 24 02 70 00 mov 0x700224,%eax
40102d: 25 00 00 00 3e and $0x3e000000,%eax
401032: 3d 00 00 00 24 cmp $0x24000000,%eax
401037: 77 0c ja 401045 <copy_mskd_gtr()+0x2a>
401039: c7 04 25 c4 02 70 00 movl $0x4,0x7002c4
401040: 04 00 00 00
401044: c3 retq
401045: c7 04 25 c4 02 70 00 movl $0x2,0x7002c4
40104c: 02 00 00 00
401050: c3 retq
0000000000401051 <copy_mskd_geq()>:
401051: c7 04 25 24 02 70 00 movl $0x22000000,0x700224
401058: 00 00 00 22
40105c: 8b 04 25 24 02 70 00 mov 0x700224,%eax
401063: 25 00 00 00 3e and $0x3e000000,%eax
401068: 3d ff ff ff 21 cmp $0x21ffffff,%eax
40106d: 77 0c ja 40107b <copy_mskd_geq()+0x2a>
40106f: c7 04 25 c4 02 70 00 movl $0x4,0x7002c4
401076: 04 00 00 00
40107a: c3 retq
40107b: c7 04 25 c4 02 70 00 movl $0x2,0x7002c4
401082: 02 00 00 00
401086: c3 retq
0000000000401087 <copy_shifted()>:
401087: c7 04 25 24 02 70 00 movl $0x16000000,0x700224
40108e: 00 00 00 16
401092: 8b 04 25 24 02 70 00 mov 0x700224,%eax
401099: c1 e8 19 shr $0x19,%eax
40109c: 83 e0 1f and $0x1f,%eax
40109f: 83 f8 0b cmp $0xb,%eax
4010a2: 74 0c je 4010b0 <copy_shifted()+0x29>
4010a4: c7 04 25 c4 02 70 00 movl $0x4,0x7002c4
4010ab: 04 00 00 00
4010af: c3 retq
4010b0: c7 04 25 c4 02 70 00 movl $0x2,0x7002c4
4010b7: 02 00 00 00
4010bb: c3 retq
00000000004010bc <bits_val(regbits::Bits<unsigned int, mcu::Serial::Config>)>:
4010bc: 89 3c 25 c4 02 70 00 mov %edi,0x7002c4
4010c3: c3 retq
00000000004010c4 <call_bits_val_var()>:
4010c4: bf 40 00 00 00 mov $0x40,%edi
4010c9: e8 ee ff ff ff callq 4010bc <bits_val(regbits::Bits<unsigned int, mcu::Serial::Config>)>
4010ce: f3 c3 repz retq
00000000004010d0 <call_bits_val_zero()>:
4010d0: bf 00 00 00 00 mov $0x0,%edi
4010d5: e8 e2 ff ff ff callq 4010bc <bits_val(regbits::Bits<unsigned int, mcu::Serial::Config>)>
4010da: f3 c3 repz retq
00000000004010dc <call_bits_val_const()>:
4010dc: bf 40 00 00 00 mov $0x40,%edi
4010e1: e8 d6 ff ff ff callq 4010bc <bits_val(regbits::Bits<unsigned int, mcu::Serial::Config>)>
4010e6: f3 c3 repz retq
00000000004010e8 <call_bits_val_global()>:
4010e8: bf 40 00 00 00 mov $0x40,%edi
4010ed: e8 ca ff ff ff callq 4010bc <bits_val(regbits::Bits<unsigned int, mcu::Serial::Config>)>
4010f2: f3 c3 repz retq
00000000004010f4 <bits_ref(regbits::Bits<unsigned int, mcu::Serial::Config> const&)>:
4010f4: 8b 07 mov (%rdi),%eax
4010f6: 89 04 25 c4 02 70 00 mov %eax,0x7002c4
4010fd: c3 retq
00000000004010fe <call_bits_ref_var()>:
4010fe: 48 83 ec 10 sub $0x10,%rsp
401102: c7 44 24 0c 01 00 00 movl $0x1,0xc(%rsp)
401109: 00
40110a: 48 8d 7c 24 0c lea 0xc(%rsp),%rdi
40110f: e8 e0 ff ff ff callq 4010f4 <bits_ref(regbits::Bits<unsigned int, mcu::Serial::Config> const&)>
401114: 48 83 c4 10 add $0x10,%rsp
401118: c3 retq
0000000000401119 <call_bits_ref_zero()>:
401119: 48 83 ec 10 sub $0x10,%rsp
40111d: c7 44 24 0c 00 00 00 movl $0x0,0xc(%rsp)
401124: 00
401125: 48 8d 7c 24 0c lea 0xc(%rsp),%rdi
40112a: e8 c5 ff ff ff callq 4010f4 <bits_ref(regbits::Bits<unsigned int, mcu::Serial::Config> const&)>
40112f: 48 83 c4 10 add $0x10,%rsp
401133: c3 retq
0000000000401134 <call_bits_ref_const()>:
401134: 48 83 ec 10 sub $0x10,%rsp
401138: c7 44 24 0c 01 00 00 movl $0x1,0xc(%rsp)
40113f: 00
401140: 48 8d 7c 24 0c lea 0xc(%rsp),%rdi
401145: e8 aa ff ff ff callq 4010f4 <bits_ref(regbits::Bits<unsigned int, mcu::Serial::Config> const&)>
40114a: 48 83 c4 10 add $0x10,%rsp
40114e: c3 retq
000000000040114f <call_bits_ref_global()>:
40114f: 48 83 ec 10 sub $0x10,%rsp
401153: c7 44 24 0c 40 00 00 movl $0x40,0xc(%rsp)
40115a: 00
40115b: 48 8d 7c 24 0c lea 0xc(%rsp),%rdi
401160: e8 8f ff ff ff callq 4010f4 <bits_ref(regbits::Bits<unsigned int, mcu::Serial::Config> const&)>
401165: 48 83 c4 10 add $0x10,%rsp
401169: c3 retq
000000000040116a <mskd_val(regbits::Mskd<unsigned int, mcu::Serial::Config>)>:
40116a: 8b 14 25 c4 02 70 00 mov 0x7002c4,%edx
401171: 89 f8 mov %edi,%eax
401173: f7 d0 not %eax
401175: 21 d0 and %edx,%eax
401177: 48 c1 ef 20 shr $0x20,%rdi
40117b: 09 c7 or %eax,%edi
40117d: 89 3c 25 c4 02 70 00 mov %edi,0x7002c4
401184: c3 retq
0000000000401185 <call_mskd_val_var()>:
401185: 48 bf 06 00 00 00 02 movabs $0x200000006,%rdi
40118c: 00 00 00
40118f: e8 d6 ff ff ff callq 40116a <mskd_val(regbits::Mskd<unsigned int, mcu::Serial::Config>)>
401194: f3 c3 repz retq
0000000000401196 <call_mskd_val_const()>:
401196: 48 bf 06 00 00 00 02 movabs $0x200000006,%rdi
40119d: 00 00 00
4011a0: e8 c5 ff ff ff callq 40116a <mskd_val(regbits::Mskd<unsigned int, mcu::Serial::Config>)>
4011a5: f3 c3 repz retq
00000000004011a7 <call_mskd_val_global()>:
4011a7: 48 bf 06 00 00 00 02 movabs $0x200000006,%rdi
4011ae: 00 00 00
4011b1: e8 b4 ff ff ff callq 40116a <mskd_val(regbits::Mskd<unsigned int, mcu::Serial::Config>)>
4011b6: f3 c3 repz retq
00000000004011b8 <mskd_ref(regbits::Mskd<unsigned int, mcu::Serial::Config> const&)>:
4011b8: 8b 14 25 c4 02 70 00 mov 0x7002c4,%edx
4011bf: 8b 07 mov (%rdi),%eax
4011c1: f7 d0 not %eax
4011c3: 21 d0 and %edx,%eax
4011c5: 0b 47 04 or 0x4(%rdi),%eax
4011c8: 89 04 25 c4 02 70 00 mov %eax,0x7002c4
4011cf: c3 retq
00000000004011d0 <call_mskd_ref_var()>:
4011d0: 48 83 ec 10 sub $0x10,%rsp
4011d4: c7 44 24 08 06 00 00 movl $0x6,0x8(%rsp)
4011db: 00
4011dc: c7 44 24 0c 02 00 00 movl $0x2,0xc(%rsp)
4011e3: 00
4011e4: 48 8d 7c 24 08 lea 0x8(%rsp),%rdi
4011e9: e8 ca ff ff ff callq 4011b8 <mskd_ref(regbits::Mskd<unsigned int, mcu::Serial::Config> const&)>
4011ee: 48 83 c4 10 add $0x10,%rsp
4011f2: c3 retq
00000000004011f3 <call_mskd_ref_const()>:
4011f3: 48 83 ec 10 sub $0x10,%rsp
4011f7: c7 44 24 08 06 00 00 movl $0x6,0x8(%rsp)
4011fe: 00
4011ff: c7 44 24 0c 04 00 00 movl $0x4,0xc(%rsp)
401206: 00
401207: 48 8d 7c 24 08 lea 0x8(%rsp),%rdi
40120c: e8 a7 ff ff ff callq 4011b8 <mskd_ref(regbits::Mskd<unsigned int, mcu::Serial::Config> const&)>
401211: 48 83 c4 10 add $0x10,%rsp
401215: c3 retq
0000000000401216 <call_mskd_ref_global()>:
401216: 48 83 ec 10 sub $0x10,%rsp
40121a: c7 44 24 08 06 00 00 movl $0x6,0x8(%rsp)
401221: 00
401222: c7 44 24 0c 02 00 00 movl $0x2,0xc(%rsp)
401229: 00
40122a: 48 8d 7c 24 08 lea 0x8(%rsp),%rdi
40122f: e8 84 ff ff ff callq 4011b8 <mskd_ref(regbits::Mskd<unsigned int, mcu::Serial::Config> const&)>
401234: 48 83 c4 10 add $0x10,%rsp
401238: c3 retq
0000000000401239 <periph_bits(mcu::Serial volatile*)>:
401239: 8b 47 04 mov 0x4(%rdi),%eax
40123c: 83 c8 40 or $0x40,%eax
40123f: 89 47 04 mov %eax,0x4(%rdi)
401242: c3 retq
0000000000401243 <call_periph_bits()>:
401243: bf c0 02 70 00 mov $0x7002c0,%edi
401248: e8 ec ff ff ff callq 401239 <periph_bits(mcu::Serial volatile*)>
40124d: f3 c3 repz retq
000000000040124f <periph_bits_val(mcu::Serial volatile*, regbits::Bits<unsigned int, mcu::Serial::Config>)>:
40124f: 8b 47 04 mov 0x4(%rdi),%eax
401252: 09 c6 or %eax,%esi
401254: 89 77 04 mov %esi,0x4(%rdi)
401257: c3 retq
0000000000401258 <call_periph_bits_val()>:
401258: be 40 00 00 00 mov $0x40,%esi
40125d: bf c0 02 70 00 mov $0x7002c0,%edi
401262: e8 e8 ff ff ff callq 40124f <periph_bits_val(mcu::Serial volatile*, regbits::Bits<unsigned int, mcu::Serial::Config>)>
401267: f3 c3 repz retq
0000000000401269 <reg_bits_val(regbits::Reg<unsigned int, mcu::Serial::Config> volatile&, regbits::Bits<unsigned int, mcu::Serial::Config>)>:
401269: 8b 07 mov (%rdi),%eax
40126b: 09 c6 or %eax,%esi
40126d: 89 37 mov %esi,(%rdi)
40126f: c3 retq
0000000000401270 <call_reg_bits_val()>:
401270: be 40 00 00 00 mov $0x40,%esi
401275: bf c4 02 70 00 mov $0x7002c4,%edi
40127a: e8 ea ff ff ff callq 401269 <reg_bits_val(regbits::Reg<unsigned int, mcu::Serial::Config> volatile&, regbits::Bits<unsigned int, mcu::Serial::Config>)>
40127f: f3 c3 repz retq
0000000000401281 <periph_bits_ref(mcu::Serial volatile*, regbits::Bits<unsigned int, mcu::Serial::Config> const&)>:
401281: 8b 47 04 mov 0x4(%rdi),%eax
401284: 0b 06 or (%rsi),%eax
401286: 89 47 04 mov %eax,0x4(%rdi)
401289: c3 retq
000000000040128a <call_periph_bits_ref()>:
40128a: 48 83 ec 10 sub $0x10,%rsp
40128e: c7 44 24 0c 40 00 00 movl $0x40,0xc(%rsp)
401295: 00
401296: 48 8d 74 24 0c lea 0xc(%rsp),%rsi
40129b: bf c0 02 70 00 mov $0x7002c0,%edi
4012a0: e8 dc ff ff ff callq 401281 <periph_bits_ref(mcu::Serial volatile*, regbits::Bits<unsigned int, mcu::Serial::Config> const&)>
4012a5: 48 83 c4 10 add $0x10,%rsp
4012a9: c3 retq
00000000004012aa <reg_bits_ref(regbits::Reg<unsigned int, mcu::Serial::Config> volatile&, regbits::Bits<unsigned int, mcu::Serial::Config> const&)>:
4012aa: 8b 07 mov (%rdi),%eax
4012ac: 0b 06 or (%rsi),%eax
4012ae: 89 07 mov %eax,(%rdi)
4012b0: c3 retq
00000000004012b1 <call_reg_bits_ref()>:
4012b1: 48 83 ec 10 sub $0x10,%rsp
4012b5: c7 44 24 0c 40 00 00 movl $0x40,0xc(%rsp)
4012bc: 00
4012bd: 48 8d 74 24 0c lea 0xc(%rsp),%rsi
4012c2: bf c4 02 70 00 mov $0x7002c4,%edi
4012c7: e8 de ff ff ff callq 4012aa <reg_bits_ref(regbits::Reg<unsigned int, mcu::Serial::Config> volatile&, regbits::Bits<unsigned int, mcu::Serial::Config> const&)>
4012cc: 48 83 c4 10 add $0x10,%rsp
4012d0: c3 retq
00000000004012d1 <periph_mskd(mcu::Serial volatile*)>:
4012d1: 8b 47 04 mov 0x4(%rdi),%eax
4012d4: 83 e0 f9 and $0xfffffff9,%eax
4012d7: 83 c8 02 or $0x2,%eax
4012da: 89 47 04 mov %eax,0x4(%rdi)
4012dd: c3 retq
00000000004012de <call_periph_mskd()>:
4012de: bf c0 02 70 00 mov $0x7002c0,%edi
4012e3: e8 e9 ff ff ff callq 4012d1 <periph_mskd(mcu::Serial volatile*)>
4012e8: f3 c3 repz retq
00000000004012ea <periph_mskd_val(mcu::Serial volatile*, regbits::Mskd<unsigned int, mcu::Serial::Config>)>:
4012ea: 8b 57 04 mov 0x4(%rdi),%edx
4012ed: 89 f0 mov %esi,%eax
4012ef: f7 d0 not %eax
4012f1: 21 d0 and %edx,%eax
4012f3: 48 c1 ee 20 shr $0x20,%rsi
4012f7: 09 c6 or %eax,%esi
4012f9: 89 77 04 mov %esi,0x4(%rdi)
4012fc: c3 retq
00000000004012fd <call_periph_mskd_val()>:
4012fd: 48 be 06 00 00 00 02 movabs $0x200000006,%rsi
401304: 00 00 00
401307: bf c0 02 70 00 mov $0x7002c0,%edi
40130c: e8 d9 ff ff ff callq 4012ea <periph_mskd_val(mcu::Serial volatile*, regbits::Mskd<unsigned int, mcu::Serial::Config>)>
401311: f3 c3 repz retq
0000000000401313 <reg_mskd_val(regbits::Reg<unsigned int, mcu::Serial::Config> volatile&, regbits::Mskd<unsigned int, mcu::Serial::Config>)>:
401313: 8b 17 mov (%rdi),%edx
401315: 89 f0 mov %esi,%eax
401317: f7 d0 not %eax
401319: 21 d0 and %edx,%eax
40131b: 48 c1 ee 20 shr $0x20,%rsi
40131f: 09 c6 or %eax,%esi
401321: 89 37 mov %esi,(%rdi)
401323: c3 retq