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Representation of L1 Interleaved layout #1292

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fbajraktariTT opened this issue Nov 15, 2024 · 0 comments · Fixed by #1607
Closed

Representation of L1 Interleaved layout #1292

fbajraktariTT opened this issue Nov 15, 2024 · 0 comments · Fixed by #1607
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@fbajraktariTT
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fbajraktariTT commented Nov 15, 2024

Method getLayoutSizeBytes returns incorrect memory usage for L1 Interleaved layouts.

Let's say we have a LayoutAttr showed in the image below that was created as a default DRAM layout for tensor<1x1024xbf16>:
Image

Now, in LegalGridAnalysis we construct L1 Interleaved layout for this tensor:
Image

It seems that we get an incorrect representation for this layout. It is expected to get memref<1x1x!tt.tile<32x32, bf16> instead of memref<1x4x!tt.tile<32x32, bf16>.
Image

The problem appears to be in withGrid method that relies on calculateLogicalShardShape. Furthermore, we use the same withGrid method for both sharding layouts and L1 Interleaved layout. It seems that in the current implementation we are handling L1 Interleaved layouts as Block sharded layouts.

Therefore, method getLayoutSizeBytes used for calculating L1 usage doesn't work properly for L1 Interleaved layouts. In the mentioned case, it returns 8192 bytes while the actual L1 usage is 2048 bytes.

@fbajraktariTT fbajraktariTT self-assigned this Nov 15, 2024
@fbajraktariTT fbajraktariTT linked a pull request Dec 17, 2024 that will close this issue
fbajraktariTT added a commit that referenced this issue Dec 19, 2024
This PR fixes the issue of incorrect `memRef` for L1 Interleaved
layouts.

Closes issue: #1292
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