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Revert "Update stm32g0 to 0.15.1"
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@andresv
andresv authored May 5, 2024
1 parent 702fb0a commit 99cc175
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Showing 7 changed files with 35 additions and 33 deletions.
2 changes: 1 addition & 1 deletion Cargo.toml
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Original file line number Diff line number Diff line change
Expand Up @@ -21,7 +21,7 @@ nb = "1.0.0"
fugit = "0.3.5"

[dependencies.stm32g0]
version = "0.15.1"
version = "0.14.0"
features = ["rt"]

[dependencies.bare-metal]
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4 changes: 2 additions & 2 deletions src/analog/adc.rs
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Expand Up @@ -362,7 +362,7 @@ where
.modify(|_, w| unsafe { w.smp1().bits(self.sample_time as u8) });

self.rb
.chselr0() // set active channel acording chapter 15.12.9 (ADC_CFGR1; CHSELRMOD=0)
.chselr() // set activ channel acording chapter 15.12.9 (ADC_CFGR1; CHSELRMOD=0)
.modify(|_, w| unsafe { w.chsel().bits(1 << PIN::channel()) });
}
}
Expand Down Expand Up @@ -415,7 +415,7 @@ where
.modify(|_, w| unsafe { w.smp1().bits(self.sample_time as u8) });

self.rb
.chselr0()
.chselr()
.modify(|_, w| unsafe { w.chsel().bits(1 << PIN::channel()) });

self.rb.isr.modify(|_, w| w.eos().set_bit());
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36 changes: 18 additions & 18 deletions src/analog/dac.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -106,8 +106,8 @@ macro_rules! dac {
pub fn enable(self) -> $CX<Enabled> {
let dac = unsafe { &(*DAC::ptr()) };

dac.mcr.modify(|_, w| unsafe { w.$mode().bits(1) });
dac.cr.modify(|_, w| w.$en().set_bit());
dac.dac_mcr.modify(|_, w| unsafe { w.$mode().bits(1) });
dac.dac_cr.modify(|_, w| w.$en().set_bit());

$CX {
_enabled: PhantomData,
Expand All @@ -117,8 +117,8 @@ macro_rules! dac {
pub fn enable_unbuffered(self) -> $CX<EnabledUnbuffered> {
let dac = unsafe { &(*DAC::ptr()) };

dac.mcr.modify(|_, w| unsafe { w.$mode().bits(2) });
dac.cr.modify(|_, w| w.$en().set_bit());
dac.dac_mcr.modify(|_, w| unsafe { w.$mode().bits(2) });
dac.dac_cr.modify(|_, w| w.$en().set_bit());

$CX {
_enabled: PhantomData,
Expand All @@ -128,8 +128,8 @@ macro_rules! dac {
pub fn enable_generator(self, config: GeneratorConfig) -> $CX<WaveGenerator> {
let dac = unsafe { &(*DAC::ptr()) };

dac.mcr.modify(|_, w| unsafe { w.$mode().bits(1) });
dac.cr.modify(|_, w| unsafe {
dac.dac_mcr.modify(|_, w| unsafe { w.$mode().bits(1) });
dac.dac_cr.modify(|_, w| unsafe {
w.$wave().bits(config.mode);
w.$ten().set_bit();
w.$mamp().bits(config.amp);
Expand Down Expand Up @@ -159,19 +159,19 @@ macro_rules! dac {
T: DelayUs<u32>,
{
let dac = unsafe { &(*DAC::ptr()) };
dac.cr.modify(|_, w| w.$en().clear_bit());
dac.mcr.modify(|_, w| unsafe { w.$mode().bits(0) });
dac.cr.modify(|_, w| w.$cen().set_bit());
dac.dac_cr.modify(|_, w| w.$en().clear_bit());
dac.dac_mcr.modify(|_, w| unsafe { w.$mode().bits(0) });
dac.dac_cr.modify(|_, w| w.$cen().set_bit());
let mut trim = 0;
while true {
dac.ccr.modify(|_, w| unsafe { w.$trim().bits(trim) });
dac.dac_ccr.modify(|_, w| unsafe { w.$trim().bits(trim) });
delay.delay_us(64_u32);
if dac.sr.read().$cal_flag().bit() {
if dac.dac_sr.read().$cal_flag().bit() {
break;
}
trim += 1;
}
dac.cr.modify(|_, w| w.$cen().clear_bit());
dac.dac_cr.modify(|_, w| w.$cen().clear_bit());

$CX {
_enabled: PhantomData,
Expand All @@ -181,7 +181,7 @@ macro_rules! dac {
/// Disable the DAC channel
pub fn disable(self) -> $CX<Disabled> {
let dac = unsafe { &(*DAC::ptr()) };
dac.cr.modify(|_, w| unsafe {
dac.dac_cr.modify(|_, w| unsafe {
w.$en().clear_bit().$wave().bits(0).$ten().clear_bit()
});

Expand Down Expand Up @@ -209,7 +209,7 @@ macro_rules! dac {
impl $CX<WaveGenerator> {
pub fn trigger(&mut self) {
let dac = unsafe { &(*DAC::ptr()) };
dac.swtrgr.write(|w| { w.$swtrig().set_bit() });
dac.dac_swtrgr.write(|w| { w.$swtrig().set_bit() });
}
}
)+
Expand Down Expand Up @@ -239,8 +239,8 @@ dac!(
cal_flag1,
otrim1,
mode1,
dhr12r1,
dor1,
dac_dhr12r1,
dac_dor1,
dacc1dhr,
wave1,
mamp1,
Expand All @@ -254,8 +254,8 @@ dac!(
cal_flag2,
otrim2,
mode2,
dhr12r2,
dor2,
dac_dhr12r2,
dac_dor2,
dacc2dhr,
wave2,
mamp2,
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14 changes: 7 additions & 7 deletions src/dmamux.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -185,13 +185,13 @@ macro_rules! dma_mux {
#[cfg(any(feature = "stm32g070", feature = "stm32g071", feature = "stm32g081"))]
dma_mux!(
channels: {
C0: (ch0, c0cr),
C1: (ch1, c1cr),
C2: (ch2, c2cr),
C3: (ch3, c3cr),
C4: (ch4, c4cr),
C5: (ch5, c5cr),
C6: (ch6, c6cr),
C0: (ch0, dmamux_c0cr),
C1: (ch1, dmamux_c1cr),
C2: (ch2, dmamux_c2cr),
C3: (ch3, dmamux_c3cr),
C4: (ch4, dmamux_c4cr),
C5: (ch5, dmamux_c5cr),
C6: (ch6, dmamux_c6cr),
},
);

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2 changes: 1 addition & 1 deletion src/i2c/blocking.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -187,7 +187,7 @@ macro_rules! i2c {

if config.slave_address_1 > 0 {
i2c.oar1.write(|w| unsafe {
w.oa1().bits(config.slave_address_1)
w.oa1_7_1().bits(config.slave_address_1 as u8)
.oa1mode().bit(config.address_11bits)
.oa1en().set_bit()
});
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6 changes: 4 additions & 2 deletions src/spi.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -169,7 +169,7 @@ macro_rules! spi {
// Enable pins
pins.setup();

spi.cr1.write(|w| {
spi.cr1.write(|w| unsafe {
w.cpha()
.bit(mode.phase == Phase::CaptureOnSecondTransition)
.cpol()
Expand All @@ -186,10 +186,12 @@ macro_rules! spi {
.set_bit()
.rxonly()
.clear_bit()
.crcl()
.dff()
.clear_bit()
.bidimode()
.clear_bit()
.ssi()
.set_bit()
.spe()
.set_bit()
});
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4 changes: 2 additions & 2 deletions src/watchdog.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -83,7 +83,7 @@ pub struct WindowWatchdog {

impl WindowWatchdog {
pub fn feed(&mut self) {
self.wwdg.cr.write(|w| w.t().bits(0xff));
self.wwdg.cr.write(|w| unsafe { w.t().bits(0xff) });
}

pub fn set_window(&mut self, window: MicroSecond) {
Expand All @@ -101,7 +101,7 @@ impl WindowWatchdog {
assert!(window <= 0x40);
self.wwdg
.cfr
.write(|w| w.wdgtb().bits(psc).w().bits(window as u8));
.write(|w| unsafe { w.wdgtb().bits(psc).w().bits(window as u8) });
}

pub fn listen(&mut self) {
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