spike throwning 'trap_store_access_fault' while saving ra in main.

[SiriEmb]

Hi Community,

I am trying to build simple helloword program with risc64-unknown-elf-gcc to run on spike emulator.

I compiled risc-gnu-toolchain --with-cmodel-medany. I want to use glibc for my application.

I am very new to riscv toolchain. Would someone please help me on what is happening during saving ra into sp here?

My build process is below:

**_hello.c
riscv64-unknown-elf-gcc -c hello.c -o hello.o -g -g3 -march=rv64gcv -mabi=lp64d -mcmodel=medany

crt0.S
riscv64-unknown-elf-gcc -c crt0.s -o crt0.o -g -g3 -march=rv64gcv -mabi=lp64d -mcmodel=medany

Linking:
riscv64-unknown-elf-gcc crt0.o hello.o -o hello -march=rv64gcv_zfh_zvfh1p0 -mabi=lp64d -lm -mcmodel=medany -nostartfiles -static -T crt_lds.lds

linker output:
..install/lib/gcc/riscv64-unknown-elf/13.1.0/../../../../riscv64-unknown-elf/bin/ld: warning: hello has a LOAD segment with RWX permissions

Running spike:-

spike -m0x80000000:0x30000000 -d hello

warning: tohost and fromhost symbols not in ELF; can't communicate with target
(spike)
core 0: 0x0000000000001000 (0x00000297) auipc t0, 0x0
(spike)
core 0: 0x0000000000001004 (0x02028593) addi a1, t0, 32
(spike)
core 0: 0x0000000000001008 (0xf1402573) csrr a0, mhartid
(spike)
core 0: 0x000000000000100c (0x0182b283) ld t0, 24(t0)
(spike)
core 0: 0x0000000000001010 (0x00028067) jr t0
(spike)
core 0: >>>> start
core 0: 0x0000000080000000 (0x00002197) auipc gp, 0x2
(spike)
core 0: 0x0000000080000004 (0x41018193) addi gp, gp, 1040
(spike)
core 0: 0x0000000080000008 (0x00e000ef) jal pc + 0xe
(spike)
core 0: >>>> main
core 0: 0x0000000080000016 (0x00001141) c.addi sp, -16
(spike)
core 0: 0x0000000080000018 (0x0000e406) c.sdsp ra, 8(sp)
core 0: exception trap_store_access_fault, epc 0x0000000080000018
core 0: tval 0xfffffffffffffff8
(spike)
core 0: exception trap_instruction_access_fault, epc 0x0000000000000000
core 0: tval 0x0000000000000000
(spike)
core 0: exception trap_instruction_access_fault, epc 0x0000000000000000
core 0: tval 0x0000000000000000
(spike)
core 0: exception trap_instruction_access_fault, epc 0x0000000000000000
core 0: tval 0x0000000000000000**

Best
SiriEmb

[SiriEmb]

Hi,
Anyone please help on this.

Best
SiriEmb

[kito-cheng]

it because nobody initialize stack pointer register, use pk or reference how pk initialize that: https://github.com/riscv-software-src/riscv-pk/blob/master/pk/pk.c#L93

[SiriEmb]

Hi kito-cheng,

Thanks for support. With pk it is working perfectly.
Is using pk mandatory for programs which use libc? or is there any other way?

Best
SiriEmb.

[kito-cheng]

Long version: pk is needed if you don't provide enough run time environment support, but it's not mandatory.
Short version: Yes if you don't understand what long version means.

[SiriEmb]

Thanks for confirming.

If possible, would you please point me to the place where I can get 'Long version' details?

Thanks in advance.

Best
SiriEmb