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This repository has been archived by the owner on May 7, 2024. It is now read-only.
However, when I want to use v1 register instead of the a1, compiler says that I am using illegal operands. I guess the issue comes from using smth else instead of r after .insn. But atm, I cannot find info about that, can you please help with what I have to change in my inline assembly here?
Better a late answer than no answer: Clobbering of vector registers such as v1 is currently not supported. kito-cheng answered in #365 that GCC 13 should support the usage of inline assembly with vector registers.
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Hey everyone!
I was trying to add a new custom instruction to RISC-V Vector extension and using this directive for my earlier codes to test the tools:
asm __volatile__ (".insn r 0x6b, 0x0, 0x00, %0, %1, a1\n" : "=r"(a) : "r"(b) );
However, when I want to use
v1
register instead of thea1
, compiler says that I am using illegal operands. I guess the issue comes from using smth else instead of r after.insn
. But atm, I cannot find info about that, can you please help with what I have to change in my inline assembly here?I am using this command to run my application:
/opt/riscv-vector/bin/riscv64-unknown-elf-gcc -march=rv64gcv vec-mod.c
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