From 20a508244aa8017d9a36a8e6b3257a6ffc22042c Mon Sep 17 00:00:00 2001
From: YenHaoChen <howard25336284@gmail.com>
Date: Mon, 12 Aug 2024 15:20:22 +0800
Subject: [PATCH] Fix a typo in
 https://github.com/riscv-software-src/riscv-isa-sim/pull/1721/commits/f11bd7b511d7909f0291589e3aaab720ededdc8a

---
 riscv/sim.cc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/riscv/sim.cc b/riscv/sim.cc
index 0e2717110b..a44aea9413 100644
--- a/riscv/sim.cc
+++ b/riscv/sim.cc
@@ -103,8 +103,8 @@ sim_t::sim_t(const cfg_t *cfg, bool halted,
                                       cfg, this, cfg->hartids[i], halted,
                                       log_file.get(), sout_));
       harts[cfg->hartids[i]] = procs[i];
-      return;
     }
+    return;
   } // otherwise, generate the procs by parsing the DTS
 
   // Only make a CLINT (Core-Local INTerrupt controller) and PLIC (Platform-