diff --git a/src/rp2_common/hardware_sync/include/hardware/sync.h b/src/rp2_common/hardware_sync/include/hardware/sync.h index b15f36bc4..35bd783e0 100644 --- a/src/rp2_common/hardware_sync/include/hardware/sync.h +++ b/src/rp2_common/hardware_sync/include/hardware/sync.h @@ -262,7 +262,9 @@ __force_inline static void spin_lock_unsafe_blocking(spin_lock_t *lock) { // Note we don't do a wfe or anything, because by convention these spin_locks are VERY SHORT LIVED and NEVER BLOCK and run // with INTERRUPTS disabled (to ensure that)... therefore nothing on our core could be blocking us, so we just need to wait on another core // anyway which should be finished soon - while (__builtin_expect(!*lock, 0)); + while (__builtin_expect(!*lock, 0)) { + tight_loop_contents(); + } __mem_fence_acquire(); } diff --git a/src/rp2_common/hardware_xosc/xosc.c b/src/rp2_common/hardware_xosc/xosc.c index 03e6785b3..e22602213 100644 --- a/src/rp2_common/hardware_xosc/xosc.c +++ b/src/rp2_common/hardware_xosc/xosc.c @@ -37,7 +37,9 @@ void xosc_init(void) { hw_set_bits(&xosc_hw->ctrl, XOSC_CTRL_ENABLE_VALUE_ENABLE << XOSC_CTRL_ENABLE_LSB); // Wait for XOSC to be stable - while(!(xosc_hw->status & XOSC_STATUS_STABLE_BITS)); + while(!(xosc_hw->status & XOSC_STATUS_STABLE_BITS)) { + tight_loop_contents(); + } } void xosc_disable(void) { @@ -46,12 +48,16 @@ void xosc_disable(void) { tmp |= (XOSC_CTRL_ENABLE_VALUE_DISABLE << XOSC_CTRL_ENABLE_LSB); xosc_hw->ctrl = tmp; // Wait for stable to go away - while(xosc_hw->status & XOSC_STATUS_STABLE_BITS); + while(xosc_hw->status & XOSC_STATUS_STABLE_BITS) { + tight_loop_contents(); + } } void xosc_dormant(void) { // WARNING: This stops the xosc until woken up by an irq xosc_hw->dormant = XOSC_DORMANT_VALUE_DORMANT; // Wait for it to become stable once woken up - while(!(xosc_hw->status & XOSC_STATUS_STABLE_BITS)); + while(!(xosc_hw->status & XOSC_STATUS_STABLE_BITS)) { + tight_loop_contents(); + } }