Regarding Runtime working on in your github code

[natrajbhargav]

dear rachel,

my spice list is
c432_flat.txt is now applying in your github code; its taking runtime is 4.83 seconds. but in the ReGDS paper it has given 0.02 sec.

how is it possible? please reply me. Waiting for your response, please

(base) natraj@Natraj:~/Desktop/ReGDS-Logic-Gate-Extraction/bin$ ./LGE --lib=0 --sp=../examples/c432_flat.sp
[INF 2024-08-28 21:11:03 0.00 sec] ----- Command-Line Options -----
[INF 2024-08-28 21:11:03 0.00 sec] Parsing file ../examples/c432_flat.sp
[INF 2024-08-28 21:11:03 0.06 sec] Completed parsing file ../examples/c432_flat.sp
[INF 2024-08-28 21:11:03 0.06 sec] Analysis of SPICE netlist completed
[INF 2024-08-28 21:11:03 0.06 sec] Port propagation completed
[INF 2024-08-28 21:11:08 4.83 sec] Completed hierarchical logic gate extraction
[INF 2024-08-28 21:11:08 4.83 sec] Completed writing verilog file