From c162cd43d81a7d029f4c7e0347f0df7eef1f0351 Mon Sep 17 00:00:00 2001
From: Matteo Perotti <mperotti@iis.ee.ethz.ch>
Date: Sat, 9 Mar 2024 11:51:36 +0100
Subject: [PATCH] hw/system: disable common-cells assertions for verilator

---
 util/Makefrag | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/util/Makefrag b/util/Makefrag
index cfb51dc9..2d90894b 100644
--- a/util/Makefrag
+++ b/util/Makefrag
@@ -57,7 +57,7 @@ VLT_FLAGS    += -Wno-PINMISSING
 VLT_FLAGS    += -Wno-fatal
 VLT_FLAGS    += --unroll-count 1024
 VLT_FLAGS    += --timing
-VLT_BENDER   += -t rtl -t spatz -t spatz_test -t snitch_test
+VLT_BENDER   += -t rtl -t spatz -t spatz_test -t snitch_test --define COMMON_CELLS_ASSERTS_OFF
 VLT_SOURCES  := $(shell ${BENDER} script flist ${VLT_BENDER} | ${SED_SRCS})
 VLT_CFLAGS   += -std=c++17 -fcoroutines
 VLT_CFLAGS   += -I${VLT_BUILDDIR}/riscv-isa-sim -I${VLT_BUILDDIR} -I${VERILATOR_INSTALL_DIR}/share/verilator/include -I${VERILATOR_INSTALL_DIR}/share/verilator/include/vltstd -I${ROOT}/hw/ip/snitch_test/src