From 8ecb9e67f75e039dd9b3d7475807d81e4d2eb923 Mon Sep 17 00:00:00 2001 From: Viviane Potocnik Date: Fri, 28 Jun 2024 15:35:19 +0200 Subject: [PATCH] [CI] Move FA tests to FDIV suite --- .gitlab-ci.yml | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml index 92123dd966..ff8640063a 100644 --- a/.gitlab-ci.yml +++ b/.gitlab-ci.yml @@ -105,11 +105,6 @@ snitch-cluster-vsim: # Run additional, more extensive tests - cd sw/apps/blas/gemm/test - ./run.py runs.yaml --cfg $PWD/cfg/* --simulator vsim -j - - cd ../../../dnn/flashattention_2/test - # FP8 FA-2 tests are failing with precision mismatch - # due to operand ordering - - ./run.py runs.yaml --cfg $PWD/cfg/fp32* --simulator vsim -j - - ./run.py runs.yaml --cfg $PWD/cfg/fp16* --simulator vsim -j # Banshee snitch-cluster-banshee: @@ -134,6 +129,11 @@ snitch-cluster-fdiv-vsim: - make CFG_OVERRIDE=cfg/fdiv.hjson sw - make bin/snitch_cluster.vsim - ./util/run.py sw/fdiv.yaml --simulator vsim -j --run-dir runs/vsim + - cd sw/apps/dnn/flashattention_2/test + # FP8 FA-2 tests are failing with precision mismatch + # due to operand ordering + - ./run.py runs.yaml --cfg $PWD/cfg/fp32* --simulator vsim -j + - ./run.py runs.yaml --cfg $PWD/cfg/fp16* --simulator vsim -j # Test OmegaNet TCDM interconnect snitch-cluster-omega-vsim: