diff --git a/hw/snitch_cluster/test/bootdata.cc.tpl b/hw/snitch_cluster/test/bootdata.cc.tpl index e0d71fdd3..140f03dcb 100644 --- a/hw/snitch_cluster/test/bootdata.cc.tpl +++ b/hw/snitch_cluster/test/bootdata.cc.tpl @@ -14,8 +14,7 @@ const BootData BOOTDATA = {.boot_addr = ${hex(cfg['cluster']['boot_addr'])}, .tcdm_offset = ${hex(cfg['cluster']['cluster_base_offset'])}, .global_mem_start = ${hex(cfg['dram']['address'])}, .global_mem_end = ${hex(cfg['dram']['address'] + cfg['dram']['length'])}, - .cluster_count = ${cfg['s1_quadrant']['nr_clusters']}, - .s1_quadrant_count = ${cfg['nr_s1_quadrant']}, + .cluster_count = ${cfg['cluster']['nr_clusters']}, .clint_base = ${hex(cfg['peripherals']['clint']['address'])}}; } // namespace sim diff --git a/target/common/test/tb_lib.hh b/target/common/test/tb_lib.hh index e117289cb..9a12910e1 100644 --- a/target/common/test/tb_lib.hh +++ b/target/common/test/tb_lib.hh @@ -126,7 +126,6 @@ struct BootData { uint64_t global_mem_start; uint64_t global_mem_end; uint32_t cluster_count; - uint32_t s1_quadrant_count; uint32_t clint_base; }; extern const BootData BOOTDATA; diff --git a/target/snitch_cluster/sw/runtime/common/snitch_cluster_defs.h.tpl b/target/snitch_cluster/sw/runtime/common/snitch_cluster_defs.h.tpl index 4e422b84f..db765ae9c 100644 --- a/target/snitch_cluster/sw/runtime/common/snitch_cluster_defs.h.tpl +++ b/target/snitch_cluster/sw/runtime/common/snitch_cluster_defs.h.tpl @@ -9,7 +9,7 @@ // Hardware parameters #define SNRT_BASE_HARTID CFG_CLUSTER_BASE_HARTID #define SNRT_CLUSTER_CORE_NUM CFG_CLUSTER_NR_CORES -#define SNRT_CLUSTER_NUM ${cfg['nr_s1_quadrant'] * cfg['s1_quadrant']['nr_clusters']} +#define SNRT_CLUSTER_NUM ${cfg['cluster']['nr_clusters']} #define SNRT_CLUSTER_DM_CORE_NUM 1 #define SNRT_TCDM_START_ADDR CLUSTER_TCDM_BASE_ADDR #define SNRT_TCDM_SIZE (CLUSTER_PERIPH_BASE_ADDR - CLUSTER_TCDM_BASE_ADDR)