hw: Fix load-store consistency between int and FP datapaths #1109
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Feb 9, 2024 in 0s
reviewdog [verible-verilog-lint] report
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Findings (1)
hw/snitch/src/snitch_lsu.sv|138 col 101| Line length exceeds max: 100; is: 113 [Style: line-length] [line-length]
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Check warning on line 138 in hw/snitch/src/snitch_lsu.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/snitch/src/snitch_lsu.sv#L138
Line length exceeds max: 100; is: 113 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 113 [Style: line-length] [line-length]" location:{path:"./hw/snitch/src/snitch_lsu.sv" range:{start:{line:138 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
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