hw: Remove shuffle unit in FP SS #2225
reviewdog [verible-verilog-lint] report
reported by reviewdog 🐶
Findings (7)
hw/snitch_cluster/src/snitch_shuffle_unit.sv|38 col 39| All generate block statements must have a label [Style: generate-statements] [generate-label]
hw/snitch_cluster/src/snitch_shuffle_unit.sv|59 col 101| Line length exceeds max: 100; is: 107 [Style: line-length] [line-length]
hw/snitch_cluster/src/snitch_shuffle_unit.sv|61 col 12| All generate block statements must have a label [Style: generate-statements] [generate-label]
hw/snitch_cluster/src/snitch_shuffle_unit.sv|71 col 101| Line length exceeds max: 100; is: 107 [Style: line-length] [line-length]
hw/snitch_cluster/src/snitch_shuffle_unit.sv|73 col 12| All generate block statements must have a label [Style: generate-statements] [generate-label]
hw/snitch_cluster/src/snitch_shuffle_unit.sv|83 col 101| Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]
hw/snitch_cluster/src/snitch_shuffle_unit.sv|85 col 12| All generate block statements must have a label [Style: generate-statements] [generate-label]
Filtered Findings (0)
Annotations
Check warning on line 38 in hw/snitch_cluster/src/snitch_shuffle_unit.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/snitch_cluster/src/snitch_shuffle_unit.sv#L38
All generate block statements must have a label [Style: generate-statements] [generate-label]
Raw output
message:"All generate block statements must have a label [Style: generate-statements] [generate-label]" location:{path:"./hw/snitch_cluster/src/snitch_shuffle_unit.sv" range:{start:{line:38 column:39}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 59 in hw/snitch_cluster/src/snitch_shuffle_unit.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/snitch_cluster/src/snitch_shuffle_unit.sv#L59
Line length exceeds max: 100; is: 107 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 107 [Style: line-length] [line-length]" location:{path:"./hw/snitch_cluster/src/snitch_shuffle_unit.sv" range:{start:{line:59 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 61 in hw/snitch_cluster/src/snitch_shuffle_unit.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/snitch_cluster/src/snitch_shuffle_unit.sv#L61
All generate block statements must have a label [Style: generate-statements] [generate-label]
Raw output
message:"All generate block statements must have a label [Style: generate-statements] [generate-label]" location:{path:"./hw/snitch_cluster/src/snitch_shuffle_unit.sv" range:{start:{line:61 column:12}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 71 in hw/snitch_cluster/src/snitch_shuffle_unit.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/snitch_cluster/src/snitch_shuffle_unit.sv#L71
Line length exceeds max: 100; is: 107 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 107 [Style: line-length] [line-length]" location:{path:"./hw/snitch_cluster/src/snitch_shuffle_unit.sv" range:{start:{line:71 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 73 in hw/snitch_cluster/src/snitch_shuffle_unit.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/snitch_cluster/src/snitch_shuffle_unit.sv#L73
All generate block statements must have a label [Style: generate-statements] [generate-label]
Raw output
message:"All generate block statements must have a label [Style: generate-statements] [generate-label]" location:{path:"./hw/snitch_cluster/src/snitch_shuffle_unit.sv" range:{start:{line:73 column:12}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 83 in hw/snitch_cluster/src/snitch_shuffle_unit.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/snitch_cluster/src/snitch_shuffle_unit.sv#L83
Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]
Raw output
message:"Line length exceeds max: 100; is: 102 [Style: line-length] [line-length]" location:{path:"./hw/snitch_cluster/src/snitch_shuffle_unit.sv" range:{start:{line:83 column:101}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 85 in hw/snitch_cluster/src/snitch_shuffle_unit.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] hw/snitch_cluster/src/snitch_shuffle_unit.sv#L85
All generate block statements must have a label [Style: generate-statements] [generate-label]
Raw output
message:"All generate block statements must have a label [Style: generate-statements] [generate-label]" location:{path:"./hw/snitch_cluster/src/snitch_shuffle_unit.sv" range:{start:{line:85 column:12}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}