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Bender.yml
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Bender.yml
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# Copyright 2020-2021 ETH Zurich and University of Bologna.
# Solderpad Hardware License, Version 0.51, see LICENSE for details.
# SPDX-License-Identifier: SHL-0.51
package:
name: riscv-dbg
authors:
- Florian Zaruba <[email protected]>
- Robert Balas <[email protected]>
dependencies:
tech_cells_generic: { git: "https://github.com/pulp-platform/tech_cells_generic.git", version: 0.2.3 }
common_cells: {git: "https://github.com/pulp-platform/common_cells.git", version: 1.24.0}
sources:
files:
# Level 1:
- src/dm_pkg.sv
- debug_rom/debug_rom.sv
- debug_rom/debug_rom_one_scratch.sv
# Level 2:
- src/dm_csrs.sv
- src/dm_mem.sv
- src/dmi_cdc.sv
- target: not(all(xilinx, bscane))
files:
- src/dmi_jtag_tap.sv
- target: all(xilinx, bscane)
files:
- src/dmi_bscane_tap.sv
# Level 3:
- src/dm_sba.sv
- src/dm_top.sv
- src/dmi_jtag.sv
# Level 4:
- src/dm_obi_top.sv
- target: simulation
files:
- src/dmi_test.sv
- target: test
files:
# Level 1
- src/dmi_intf.sv
- tb/jtag_dmi/jtag_intf.sv
- tb/jtag_dmi/jtag_test.sv
# Level 3
- tb/jtag_dmi/tb_jtag_dmi.sv