diff --git a/Bender.lock b/Bender.lock
index 006f051c3..190269741 100644
--- a/Bender.lock
+++ b/Bender.lock
@@ -155,8 +155,8 @@ packages:
     - register_interface
     - tech_cells_generic
   register_interface:
-    revision: d7693be4aef1fc7e7eb2b00b41c42e87d959866c
-    version: 0.4.2
+    revision: 5356a1ed93057a18085cb5d8e1b05c4e1965ced4
+    version: null
     source:
       Git: https://github.com/pulp-platform/register_interface.git
     dependencies:
diff --git a/Bender.yml b/Bender.yml
index d0f7fbd79..8909ac7ca 100644
--- a/Bender.yml
+++ b/Bender.yml
@@ -27,7 +27,7 @@ dependencies:
   irq_router:               { git: "https://github.com/pulp-platform/irq_router.git",             version: 0.0.1-beta.1 }
   opentitan_peripherals:    { git: "https://github.com/pulp-platform/opentitan_peripherals.git",  version: 0.4.0  }
   redundancy_cells:         { git: "https://github.com/pulp-platform/redundancy_cells.git",       rev: "3fbd080e" } # branch: astral
-  register_interface:       { git: "https://github.com/pulp-platform/register_interface.git",     version: 0.4.2  }
+  register_interface:       { git: "https://github.com/pulp-platform/register_interface.git",     rev: "5356a1ed" } # branch: astral
   riscv-dbg:                { git: "https://github.com/pulp-platform/riscv-dbg.git",              version: 0.8.0  }
   serial_link:              { git: "https://github.com/pulp-platform/serial_link.git",            version: 1.1.0  }
   tagger:                   { git: "https://github.com/pulp-platform/transaction-tagger.git",     rev: b288376    }
diff --git a/hw/cheshire_pkg.sv b/hw/cheshire_pkg.sv
index 96568886c..c6fbe6e1b 100644
--- a/hw/cheshire_pkg.sv
+++ b/hw/cheshire_pkg.sv
@@ -108,6 +108,7 @@ package cheshire_pkg;
     // Reg parameters
     dw_bt   RegMaxReadTxns;
     dw_bt   RegMaxWriteTxns;
+    bit     AxiToRegCut;
     aw_bt   RegAmoNumCuts;
     bit     RegAmoPostCut;
     // External AXI ports (limited number of ports and rules)
@@ -562,6 +563,7 @@ package cheshire_pkg;
     AxiUserDefault    : 0,
     RegMaxReadTxns    : 8,
     RegMaxWriteTxns   : 8,
+    AxiToRegCut       : 0,
     RegAmoNumCuts     : 1,
     RegAmoPostCut     : 1,
     // RTC
diff --git a/hw/cheshire_soc.sv b/hw/cheshire_soc.sv
index a6bbf4de2..f4072d96e 100644
--- a/hw/cheshire_soc.sv
+++ b/hw/cheshire_soc.sv
@@ -366,6 +366,7 @@ module cheshire_soc import cheshire_pkg::*; #(
     .AxiIdWidth   ( AxiSlvIdWidth    ),
     .AxiUserWidth ( Cfg.AxiUserWidth ),
     .RegDataWidth ( 32'd32 ),
+    .RegCut       ( Cfg.AxiToRegCut ),
     .axi_req_t    ( axi_slv_req_t ),
     .axi_rsp_t    ( axi_slv_rsp_t ),
     .reg_req_t    ( reg_req_t ),