diff --git a/docs/tg/sim.md b/docs/tg/sim.md
index 3743d080..169690b4 100644
--- a/docs/tg/sim.md
+++ b/docs/tg/sim.md
@@ -12,21 +12,21 @@ We plan on supporting more simulators in the future. If your situation requires
 
 We provide a SystemVerilog testbench for `cheshire_soc` running baremetal programs. This code is either preloaded through simulated interface drivers or read from external memory models by the boot ROM and then executed, depending on how the  `PRELMODE` and `BOOTMODE` variables are set:
 
-  | `BOOTMODE` | `PRELMODE` | Action                                                |
-  | ---------- | ---------- | ----------------------------------------------------- |
-  | 0          | 0          | Preload through JTAG                                  |
-  | 0          | 1          | Preload through serial link                           |
-  | 0          | 2          | Preload through UART                                  |
-  | 1-3        | -          | Autonomous boot, see [Boot ROM](../um/sw.md#boot-rom) |
+| `BOOTMODE` | `PRELMODE` | Action                                                |
+| ---------- | ---------- | ----------------------------------------------------- |
+| 0          | 0          | Preload through JTAG                                  |
+| 0          | 1          | Preload through serial link                           |
+| 0          | 2          | Preload through UART                                  |
+| 1-3        | -          | Autonomous boot, see [Boot ROM](../um/sw.md#boot-rom) |
 
 Preloading boot modes expect an ELF executable to be passed through `BINARY`, while autonomous boot modes expect a disk image (GPT formatted or raw code) to be passed through `IMAGE`. For more information on how to build software for Cheshire and its boot process, see [Software Stack](../um/sw.md).
 
 The `SELCFG` parameter selects the simulation configuration specified in the `tb_cheshire_pkg` package. If not set or set to `0`, the default configuration is selected.
 
-  | `SELCFG` | Configuration (`tb_cheshire_pkg`)                     |
-  | -------- | ----------------------------------------------------- |
-  | 0        | Default configuration from `cheshire_pkg`             |
-  | 1        | AXI-RT-enabled configuration                          |
+| `SELCFG` | Configuration (`tb_cheshire_pkg`)         |
+| -------- | ----------------------------------------- |
+| 0        | Default configuration from `cheshire_pkg` |
+| 1        | AXI-RT-enabled configuration              |
 
 For simulation of Cheshire in other designs, we provide the module `cheshire_vip` encapsulating all verification IPs and their interfaces. For details, see [Verifying Cheshire In-System](integr.md#verifying-cheshire-in-system).