From 34e2bea473479da377c5aa017f3e997f50adf71f Mon Sep 17 00:00:00 2001 From: Paul Scheffler Date: Thu, 28 Nov 2024 22:53:14 +0100 Subject: [PATCH] sw/tests: Clean lint --- sw/tests/axirt_budget.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/sw/tests/axirt_budget.c b/sw/tests/axirt_budget.c index 03292264..cc5bc13c 100644 --- a/sw/tests/axirt_budget.c +++ b/sw/tests/axirt_budget.c @@ -86,17 +86,19 @@ int main(void) { // Wait for writes, then launch blocking DMA transfer fence(); - sys_dma_2d_blk_memcpy((uintptr_t)(void *)dma_dst, (uintptr_t)(void *)dma_src, sizeof(golden), - 0, 0, 1); + sys_dma_2d_blk_memcpy((uintptr_t)(void *)dma_dst, (uintptr_t)(void *)dma_src, sizeof(golden), 0, + 0, 1); // Check DMA transfers against gold. for (int i = 0; i < DMA_NUM_BEATS; i++) CHECK_ASSERT(20 + i, dma_dst[i] == golden[i]); // Read budget registers for dma and compare - int dma_read_budget_left = *reg32(&__base_axirt, AXI_RT_READ_BUDGET_LEFT_0_REG_OFFSET - + AXI_RT_PARAM_NUM_SUB * chs_dma_id * sizeof(uint32_t)); - int dma_write_budget_left = *reg32(&__base_axirt, AXI_RT_WRITE_BUDGET_LEFT_0_REG_OFFSET - + AXI_RT_PARAM_NUM_SUB * chs_dma_id * sizeof(uint32_t)); + int dma_read_budget_left = + *reg32(&__base_axirt, AXI_RT_READ_BUDGET_LEFT_0_REG_OFFSET + + AXI_RT_PARAM_NUM_SUB * chs_dma_id * sizeof(uint32_t)); + int dma_write_budget_left = + *reg32(&__base_axirt, AXI_RT_WRITE_BUDGET_LEFT_0_REG_OFFSET + + AXI_RT_PARAM_NUM_SUB * chs_dma_id * sizeof(uint32_t)); // Check budget: return 0 if (initial budget - final budget) matches the // number of transferred bytes, otherwise return 1