diff --git a/Bender.local b/Bender.local index 1fd7ef34..e816976f 100644 --- a/Bender.local +++ b/Bender.local @@ -13,4 +13,5 @@ overrides: hier-icache: { git: "https://github.com/pulp-platform/hier-icache.git" , rev: a7e3f4e4c7fe607bcd6b9d94db77f612fd6ef6be } scm: { git: "https://github.com/pulp-platform/scm.git" , rev: f7b51416f3c407e4c31e9c016616d57aae2687bd } cluster_interconnect: { git: "https://github.com/pulp-platform/cluster_interconnect.git", rev: 89e1019d64a86425211be6200770576cbdf3e8b3 } # branch: assertion-fix - obi: { git: "https://github.com/pulp-platform/obi.git" , rev: c54a7374bce9f4239c07f950ced339af926b5ff8 } # branch: atops \ No newline at end of file + obi: { git: "https://github.com/pulp-platform/obi.git" , rev: c54a7374bce9f4239c07f950ced339af926b5ff8 } # branch: atops + common_cells: { git: "https://github.com/pulp-platform/common_cells.git" , version: =1.30.0 } \ No newline at end of file diff --git a/Bender.lock b/Bender.lock index 0cb30230..f9d87213 100644 --- a/Bender.lock +++ b/Bender.lock @@ -126,7 +126,7 @@ packages: - register_interface - tech_cells_generic cheshire: - revision: 3b773c80985294375421c8f8ad57c009c74b3d46 + revision: e5fc1ea4035cbb99a32c7d49f39745861df1c152 version: null source: Git: https://github.com/pulp-platform/cheshire.git @@ -151,7 +151,7 @@ packages: revision: bed98f88761ca86706c36c4c33ac600d88c42373 version: null source: - Git: https://github.com/pulp-platform/clic + Git: https://github.com/pulp-platform/clic.git dependencies: - common_cells - register_interface @@ -477,8 +477,8 @@ packages: dependencies: - tech_cells_generic serial_link: - revision: f79be97dbd96707b822dd6c2ed7ca87b54bd4378 - version: 1.0.1 + revision: 77bec1aebd92b2ebea9962814f2370d5d48390c3 + version: 1.1.0 source: Git: https://github.com/pulp-platform/serial_link dependencies: diff --git a/Bender.yml b/Bender.yml index b6ee4c64..6ce99a26 100644 --- a/Bender.yml +++ b/Bender.yml @@ -12,7 +12,7 @@ package: dependencies: register_interface: { git: https://github.com/pulp-platform/register_interface.git, rev: 2bb08879bc2ceabe2b6a0dc283753048a739e27b } # branch: main until newer version tag later than v0.4.0 axi: { git: https://github.com/pulp-platform/axi.git, version: 0.39.0-beta.9 } # overridden in Bender.local to use axi-rt feature - cheshire: { git: https://github.com/pulp-platform/cheshire.git, rev: 3b773c80985294375421c8f8ad57c009c74b3d46 } # branch: aottaviano/cva6-clic + cheshire: { git: https://github.com/pulp-platform/cheshire.git, rev: e5fc1ea4035cbb99a32c7d49f39745861df1c152 } # branch: aottaviano/cva6-clic hyperbus: { git: https://github.com/pulp-platform/hyperbus.git, rev: 2adb7271438cdb96c19fbaf3e2a6bf89ffeee568 } # branch: lv/phys_in_use car_l2: { git: git@iis-git.ee.ethz.ch:carfield/carfield_l2_mem.git, rev: 4239b2a510d65aa110bcc8a070e434cabd1a8b9a } # branch: main safety_island: { git: git@iis-git.ee.ethz.ch:carfield/safety-island.git, rev: 60e768a3ef29f47339e31674d497293f5a768893 } # branch: atops @@ -62,6 +62,15 @@ sources: files: - target/synth/carfield_synth_wrap.sv + - target: intel16_elab_only + files: + - nonfree/intel16/sourcecode/tc_clk.sv + - nonfree/intel16/sourcecode/tc_sram.sv + - nonfree/intel16/sourcecode/tc_pads.sv + - nonfree/intel16/sourcecode/generic_delay_D4_O1_3P750_CG0.sv + - nonfree/intel16/sourcecode/tc_sram_impl.sv + - nonfree/intel16/sourcecode/sync.sv + vendor_package: - name: reggen target_dir: "utils" diff --git a/carfield.mk b/carfield.mk index bd63da2c..1e9cf21e 100644 --- a/carfield.mk +++ b/carfield.mk @@ -72,11 +72,11 @@ endif ###################### CAR_NONFREE_REMOTE ?= git@iis-git.ee.ethz.ch:carfield/carfield-nonfree.git -CAR_NONFREE_COMMIT ?= 5b6b7ed7c08ec079a6725f6b2c3ddf69fea3ba16 +CAR_NONFREE_COMMIT ?= c75d038822b71a7a52fb24f98d967f0bf1c7f3c6 ## Clone the non-free verification IP for the Carfield TB car-nonfree-init: - git clone $(CAR_NONFREE_REMOTE) nonfree + git clone $(CAR_NONFREE_REMOTE) $(CAR_ROOT)/nonfree cd nonfree && git checkout $(CAR_NONFREE_COMMIT) cd nonfree/intel16 && icdesign intel16 -update all -nogui @@ -144,8 +144,7 @@ scripts/carfield_compile.tcl: car-sim-init: chs-sim-init $(CAR_ROOT)/tb/hyp_vip scripts/carfield_compile.tcl ## @section Carfield SoC Simulation -## Compile the Carfield RTL using Questasim. In order to compile the TB you first have to run the -## car-nonfree-init target. +## Compile the Carfield RTL using Questasim. car-hw-build: car-sim-init $(QUESTA) vsim -c -do "source scripts/carfield_compile.tcl; exit"