From 6dd5a4a71458517b1db6dc950e9e84c521aa83e3 Mon Sep 17 00:00:00 2001 From: Nils Wistoff Date: Thu, 21 Nov 2024 17:58:18 +1100 Subject: [PATCH] axi_xbar: Add AutoSVA annotations to mst ports Signed-off-by: Nils Wistoff --- src/axi_xbar.sv | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/src/axi_xbar.sv b/src/axi_xbar.sv index 5d977660c..f559021ad 100644 --- a/src/axi_xbar.sv +++ b/src/axi_xbar.sv @@ -76,6 +76,36 @@ import cf_math_pkg::idx_width; input slv_req_t [Cfg.NoSlvPorts-1:0] slv_ports_req_i, /// AXI4+ATOP responses of the slave ports. output slv_resp_t [Cfg.NoSlvPorts-1:0] slv_ports_resp_o, + /*AUTOSVA + mst_port_r_req_0: mst_port_r_req_0 --OUT> mst_port_r_resp_0 + mst_port_r_req_0_val = mst_ports_req_o[0].ar_valid + mst_port_r_req_0_rdy = mst_ports_resp_i[0].ar_ready + mst_port_r_req_0_transid = mst_ports_req_o[0].ar.id + mst_port_r_resp_0_val = mst_ports_resp_i[0].r_valid + mst_port_r_resp_0_rdy = mst_ports_req_o[0].r_ready + mst_port_r_resp_0_transid = mst_ports_resp_o[0].ar.id + mst_port_r_req_1: mst_port_r_req_1 --OUT> mst_port_r_resp_1 + mst_port_r_req_1_val = mst_ports_req_o[1].ar_valid + mst_port_r_req_1_rdy = mst_ports_resp_i[1].ar_ready + mst_port_r_req_1_transid = mst_ports_req_o[1].ar.id + mst_port_r_resp_1_val = mst_ports_resp_i[1].r_valid + mst_port_r_resp_1_rdy = mst_ports_req_o[1].r_ready + mst_port_r_resp_1_transid = mst_ports_resp_o[1].ar.id + mst_port_w_req_0: mst_port_w_req_0 --OUT> mst_port_w_resp_0 + mst_port_w_req_0_val = mst_ports_req_o[0].aw_valid + mst_port_w_req_0_rdy = mst_ports_resp_i[0].aw_ready + mst_port_w_req_0_transid = mst_ports_req_o[0].aw.id + mst_port_w_resp_0_val = mst_ports_resp_i[0].b_valid + mst_port_w_resp_0_rdy = mst_ports_req_o[0].b_ready + mst_port_w_resp_0_transid = mst_ports_resp_o[0].b.id + mst_port_w_req_1: mst_port_w_req_1 --OUT> mst_port_w_resp_1 + mst_port_w_req_1_val = mst_ports_req_o[1].aw_valid + mst_port_w_req_1_rdy = mst_ports_resp_i[1].aw_ready + mst_port_w_req_1_transid = mst_ports_req_o[1].aw.id + mst_port_w_resp_1_val = mst_ports_resp_i[1].b_valid + mst_port_w_resp_1_rdy = mst_ports_req_o[1].b_ready + mst_port_w_resp_1_transid = mst_ports_resp_o[1].b.id + */ /// AXI4+ATOP requests of the master ports. output mst_req_t [Cfg.NoMstPorts-1:0] mst_ports_req_o, /// AXI4+ATOP responses to the master ports.