From c0bb636ce5051358fcd83404ec8407ee6bbe0277 Mon Sep 17 00:00:00 2001 From: Matteo Perotti Date: Mon, 25 Nov 2024 14:57:46 +0100 Subject: [PATCH] [CHANGELOG] Update Changelog --- CHANGELOG.md | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/CHANGELOG.md b/CHANGELOG.md index 4bace86a6..eab755f2b 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -26,6 +26,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/spec/v2.0.0. - Bump upload and delete artifact actions - Fix synthesis-unfriendly constructs - Fix vector slicing bug in operand requesters + - Fix legality check for allowed registers in dispatcher + - Remove a couple of latches ### Added @@ -38,6 +40,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/spec/v2.0.0. - Add Ara VLSU support for MMU exceptions - Add multi-precision conv3d - Add support for unit-stride, non-unit-stride, indexed segment memory instructions + - Extend the riscv-tests MASKU-related tests ### Changed @@ -68,6 +71,9 @@ and this project adheres to [Semantic Versioning](http://semver.org/spec/v2.0.0. - Refactor MASKU - Remove bit-support for tail elements - Adapt mask tests to this behavior + - Refactor the MASKU + - The MASKU always receives balanced payloads from the lanes + - Remove FPU support for opqueues that do not need it ## 3.0.0 - 2023-09-08